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[PATCH 1/2] x86: cpu: make sure number of addressable IDs for processor
From: |
Igor Mammedov |
Subject: |
[PATCH 1/2] x86: cpu: make sure number of addressable IDs for processor cores meets the spec |
Date: |
Tue, 24 May 2022 11:10:19 -0400 |
Accourding Intel's CPUID[EAX=04H] resulting bits 31 - 26 in EAX
should be:
"
**** The nearest power-of-2 integer that is not smaller than (1 + EAX[31:26])
is the number of unique
Core_IDs reserved for addressing different processor cores in a physical
package. Core ID is a subset of
bits of the initial APIC ID.
"
ensure that values stored in EAX[31-26] always meets this condition.
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
---
target/i386/cpu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 35c3475e6c..bbe37dce2e 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -5279,7 +5279,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index,
uint32_t count,
/* QEMU gives out its own APIC IDs, never pass down bits 31..26.
*/
*eax &= ~0xFC000000;
if ((*eax & 31) && cs->nr_cores > 1) {
- *eax |= (cs->nr_cores - 1) << 26;
+ *eax |= (pow2ceil(cs->nr_cores) - 1) << 26;
}
} else if (cpu->vendor_cpuid_only && IS_AMD_CPU(env)) {
*eax = *ebx = *ecx = *edx = 0;
--
2.31.1
- [PATCH 0/2] i386: fixup number of logical CPUs when host-cache-info=on, Igor Mammedov, 2022/05/24
- [PATCH 1/2] x86: cpu: make sure number of addressable IDs for processor cores meets the spec,
Igor Mammedov <=
- [PATCH 2/2] x86: cpu: fixup number of addressable IDs for logical processors sharing cache, Igor Mammedov, 2022/05/24
- Re: [PATCH 0/2] i386: fixup number of logical CPUs when host-cache-info=on, Igor Mammedov, 2022/05/24
- Re: [PATCH 0/2] i386: fixup number of logical CPUs when host-cache-info=on, Igor Mammedov, 2022/05/25
- Re: [PATCH 0/2] i386: fixup number of logical CPUs when host-cache-info=on, Moger, Babu, 2022/05/25
Re: [PATCH 0/2] i386: fixup number of logical CPUs when host-cache-info=on, Igor Mammedov, 2022/05/31