[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PATCH v2 3/4] xlnx_dp: Fix the interrupt disable logic
From: |
Frederic Konrad |
Subject: |
[PATCH v2 3/4] xlnx_dp: Fix the interrupt disable logic |
Date: |
Thu, 19 May 2022 16:38:28 +0100 |
From: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>
Fix interrupt disable logic. Mask value 1 indicates that interrupts are
disabled.
Signed-off-by: Sai Pavan Boddu <saipava@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Frederic Konrad <fkonrad@amd.com>
---
hw/display/xlnx_dp.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/display/xlnx_dp.c b/hw/display/xlnx_dp.c
index 2686ca0f2e..48c0a8a661 100644
--- a/hw/display/xlnx_dp.c
+++ b/hw/display/xlnx_dp.c
@@ -888,7 +888,7 @@ static void xlnx_dp_write(void *opaque, hwaddr offset,
uint64_t value,
xlnx_dp_update_irq(s);
break;
case DP_INT_DS:
- s->core_registers[DP_INT_MASK] |= ~value;
+ s->core_registers[DP_INT_MASK] |= value;
xlnx_dp_update_irq(s);
break;
default:
--
2.25.1