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[PULL 19/61] hw/intc/arm_gicv3_its: Implement INV for virtual interrupts
From: |
Peter Maydell |
Subject: |
[PULL 19/61] hw/intc/arm_gicv3_its: Implement INV for virtual interrupts |
Date: |
Fri, 22 Apr 2022 11:03:50 +0100 |
Implement the ITS side of the handling of the INV command for
virtual interrupts; as usual this calls into a redistributor
function which we leave as a stub to fill in later.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220408141550.1271295-20-peter.maydell@linaro.org
---
hw/intc/gicv3_internal.h | 9 +++++++++
hw/intc/arm_gicv3_its.c | 16 ++++++++++++++--
hw/intc/arm_gicv3_redist.c | 8 ++++++++
3 files changed, 31 insertions(+), 2 deletions(-)
diff --git a/hw/intc/gicv3_internal.h b/hw/intc/gicv3_internal.h
index 25ea19de385..2f653a9b917 100644
--- a/hw/intc/gicv3_internal.h
+++ b/hw/intc/gicv3_internal.h
@@ -585,6 +585,15 @@ void gicv3_redist_update_lpi_only(GICv3CPUState *cs);
* Forget or update any cached information associated with this LPI.
*/
void gicv3_redist_inv_lpi(GICv3CPUState *cs, int irq);
+/**
+ * gicv3_redist_inv_vlpi:
+ * @cs: GICv3CPUState
+ * @irq: vLPI to invalidate cached information for
+ * @vptaddr: (guest) address of vLPI table
+ *
+ * Forget or update any cached information associated with this vLPI.
+ */
+void gicv3_redist_inv_vlpi(GICv3CPUState *cs, int irq, uint64_t vptaddr);
/**
* gicv3_redist_mov_lpi:
* @src: source redistributor
diff --git a/hw/intc/arm_gicv3_its.c b/hw/intc/arm_gicv3_its.c
index aa0a62510e5..f7c01c2be19 100644
--- a/hw/intc/arm_gicv3_its.c
+++ b/hw/intc/arm_gicv3_its.c
@@ -1090,6 +1090,7 @@ static ItsCmdResult process_inv(GICv3ITSState *s, const
uint64_t *cmdpkt)
ITEntry ite;
DTEntry dte;
CTEntry cte;
+ VTEntry vte;
ItsCmdResult cmdres;
devid = FIELD_EX64(cmdpkt[0], INV_0, DEVICEID);
@@ -1118,8 +1119,19 @@ static ItsCmdResult process_inv(GICv3ITSState *s, const
uint64_t *cmdpkt)
__func__, ite.inttype);
return CMD_CONTINUE;
}
- /* We will implement the vLPI invalidation in a later commit */
- g_assert_not_reached();
+
+ cmdres = lookup_vte(s, __func__, ite.vpeid, &vte);
+ if (cmdres != CMD_CONTINUE_OK) {
+ return cmdres;
+ }
+ if (!intid_in_lpi_range(ite.intid) ||
+ ite.intid >= (1ULL << (vte.vptsize + 1))) {
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: intid 0x%x out of range\n",
+ __func__, ite.intid);
+ return CMD_CONTINUE;
+ }
+ gicv3_redist_inv_vlpi(&s->gicv3->cpu[vte.rdbase], ite.intid,
+ vte.vptaddr << 16);
break;
default:
g_assert_not_reached();
diff --git a/hw/intc/arm_gicv3_redist.c b/hw/intc/arm_gicv3_redist.c
index 78650a3bb4c..856494b4e8f 100644
--- a/hw/intc/arm_gicv3_redist.c
+++ b/hw/intc/arm_gicv3_redist.c
@@ -808,6 +808,14 @@ void gicv3_redist_process_vlpi(GICv3CPUState *cs, int irq,
uint64_t vptaddr,
*/
}
+void gicv3_redist_inv_vlpi(GICv3CPUState *cs, int irq, uint64_t vptaddr)
+{
+ /*
+ * The redistributor handling for invalidating cached information
+ * about a VLPI will be added in a subsequent commit.
+ */
+}
+
void gicv3_redist_set_irq(GICv3CPUState *cs, int irq, int level)
{
/* Update redistributor state for a change in an external PPI input line */
--
2.25.1
- [PULL 05/61] target/arm/cpu.c: ignore VIRQ and VFIQ if no EL2, (continued)
- [PULL 05/61] target/arm/cpu.c: ignore VIRQ and VFIQ if no EL2, Peter Maydell, 2022/04/22
- [PULL 06/61] hw/intc/arm_gicv3_its: Factor out "is intid a valid LPI ID?", Peter Maydell, 2022/04/22
- [PULL 09/61] hw/intc/arm_gicv3_its: Implement VMAPP, Peter Maydell, 2022/04/22
- [PULL 17/61] hw/intc/arm_gicv3_its: Implement VSYNC, Peter Maydell, 2022/04/22
- [PULL 15/61] hw/intc/arm_gicv3: Keep pointers to every connected ITS, Peter Maydell, 2022/04/22
- [PULL 03/61] hw/intc/arm_gicv3: Insist that redist region capacity matches CPU count, Peter Maydell, 2022/04/22
- [PULL 02/61] hw/intc/arm_gicv3: Sanity-check num-cpu property, Peter Maydell, 2022/04/22
- [PULL 08/61] hw/intc/arm_gicv3_its: Implement VMAPI and VMAPTI, Peter Maydell, 2022/04/22
- [PULL 11/61] hw/intc/arm_gicv3_its: Factor out "find ITE given devid, eventid", Peter Maydell, 2022/04/22
- [PULL 13/61] hw/intc/arm_gicv3_its: Split out process_its_cmd() physical interrupt code, Peter Maydell, 2022/04/22
- [PULL 19/61] hw/intc/arm_gicv3_its: Implement INV for virtual interrupts,
Peter Maydell <=
- [PULL 14/61] hw/intc/arm_gicv3_its: Handle virtual interrupts in process_its_cmd(), Peter Maydell, 2022/04/22
- [PULL 21/61] hw/intc/arm_gicv3_its: Implement VINVALL, Peter Maydell, 2022/04/22
- [PULL 20/61] hw/intc/arm_gicv3_its: Implement VMOVI, Peter Maydell, 2022/04/22
- [PULL 26/61] hw/intc/arm_gicv3_cpuif: Don't recalculate maintenance irq unnecessarily, Peter Maydell, 2022/04/22
- [PULL 24/61] hw/intc/arm_gicv3_cpuif: Split "update vIRQ/vFIQ" from gicv3_cpuif_virt_update(), Peter Maydell, 2022/04/22
- [PULL 16/61] hw/intc/arm_gicv3_its: Implement VMOVP, Peter Maydell, 2022/04/22
- [PULL 18/61] hw/intc/arm_gicv3_its: Implement INV command properly, Peter Maydell, 2022/04/22
- [PULL 22/61] hw/intc/arm_gicv3: Implement GICv4's new redistributor frame, Peter Maydell, 2022/04/22
- [PULL 23/61] hw/intc/arm_gicv3: Implement new GICv4 redistributor registers, Peter Maydell, 2022/04/22
- [PULL 25/61] hw/intc/arm_gicv3_cpuif: Support vLPIs, Peter Maydell, 2022/04/22