GCC 10.1 introduced the -moutline-atomics option on Aarch64.
This options is enabled by default, and triggers a link failure:
Undefined symbols for architecture arm64:
"___aarch64_cas1_acq_rel", referenced from:
_qmp_migrate_recover in migration_migration.c.o
_cpu_atomic_cmpxchgb_mmu in accel_tcg_cputlb.c.o
_cpu_atomic_fetch_sminb_mmu in accel_tcg_cputlb.c.o
_cpu_atomic_fetch_uminb_mmu in accel_tcg_cputlb.c.o
_cpu_atomic_fetch_smaxb_mmu in accel_tcg_cputlb.c.o
_cpu_atomic_fetch_umaxb_mmu in accel_tcg_cputlb.c.o
_cpu_atomic_smin_fetchb_mmu in accel_tcg_cputlb.c.o
...
"___aarch64_ldadd4_acq_rel", referenced from:
_multifd_recv_new_channel in migration_multifd.c.o
_monitor_event in monitor_hmp.c.o
_handle_hmp_command in monitor_hmp.c.o
_colo_compare_finalize in net_colo-compare.c.o
_flatview_unref in softmmu_memory.c.o
_virtio_scsi_hotunplug in hw_scsi_virtio-scsi.c.o
_tcg_register_thread in tcg_tcg.c.o
...
"___aarch64_swp4_acq", referenced from:
_qemu_spin_lock in softmmu_cpu-timers.c.o
_cpu_get_ticks in softmmu_cpu-timers.c.o
_qemu_spin_lock in softmmu_icount.c.o
_cpu_exec in accel_tcg_cpu-exec.c.o
_page_flush_tb_1.isra.0 in accel_tcg_translate-all.c.o
_page_entry_lock in accel_tcg_translate-all.c.o
_do_tb_phys_invalidate in accel_tcg_translate-all.c.o
...
QEMU implements its own atomic operations using C11 builtin helpers.
Disable the GCC out-of-line atomic ops.
Signed-off-by: Philippe Mathieu-Daudé<f4bug@amsat.org>
---
Cc: Stefan Hajnoczi<stefanha@redhat.com>
Cc: Paolo Bonzini<pbonzini@redhat.com>
Clearly out of my understanding, but at least it links and the qtests
pass.
---
configure | 12 ++++++++++++
1 file changed, 12 insertions(+)