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RE: [PATCH v2 1/5] RISC-V: larger and more consistent register set for '


From: Schwarz, Konrad
Subject: RE: [PATCH v2 1/5] RISC-V: larger and more consistent register set for 'info registers'
Date: Wed, 5 Jan 2022 12:38:09 +0000

> -----Original Message-----
> From: Richard Henderson <richard.henderson@linaro.org>
> Sent: Tuesday, January 4, 2022 21:57
> Subject: Re: [PATCH v2 1/5] RISC-V: larger and more consistent register set 
> for 'info registers'
> 
> On 1/4/22 7:51 AM, Konrad Schwarz wrote:
> >           static const int dump_csrs[] = {
> > +
> > +#  if 0
> > +            CSR_USTATUS,
> > +            CSR_UIE,
> > +            CSR_UTVEC,
> 
> Adding huge sections of #if 0 code is not acceptable.

I'm not sure on how to solve the dilemma of

* transgressing on QEMUs coding guidelines on the one side
  (large sections of commented out code)

* having `info registers' output a huge swath of CSRs,
  swamping the user and making the command impractical

I feel that providing some control at compile
time via `# if' conditional compilation is preferrable to just dumping
everything.  I could of course only list the CSRs that
are interesting to me, currently, but I thought it
would be better to list (almost) all of them and give at least
programmers an easy way to enable the blocks of CSRs
that are of interest to them.

Obviously, the best solution would be to extend the command to
add a filter argument, similar to GDB's `info registers'
(i.e. info registers XXX), but I don't know how to do that in QEMU and
it would work differently from other target architectures.

What would you suggest?

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