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[PATCH v2 12/23] dma: Let dma_buf_read() take MemTxAttrs argument
From: |
Philippe Mathieu-Daudé |
Subject: |
[PATCH v2 12/23] dma: Let dma_buf_read() take MemTxAttrs argument |
Date: |
Thu, 23 Dec 2021 12:55:43 +0100 |
Let devices specify transaction attributes when calling
dma_buf_read().
Keep the default MEMTXATTRS_UNSPECIFIED in the few callers.
Reviewed-by: Klaus Jensen <k.jensen@samsung.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
include/sysemu/dma.h | 2 +-
hw/ide/ahci.c | 4 ++--
hw/nvme/ctrl.c | 2 +-
hw/scsi/megasas.c | 24 ++++++++++++------------
hw/scsi/scsi-bus.c | 2 +-
softmmu/dma-helpers.c | 5 ++---
6 files changed, 19 insertions(+), 20 deletions(-)
diff --git a/include/sysemu/dma.h b/include/sysemu/dma.h
index e3dd74a9c4f..fd8f16003dd 100644
--- a/include/sysemu/dma.h
+++ b/include/sysemu/dma.h
@@ -302,7 +302,7 @@ BlockAIOCB *dma_blk_read(BlockBackend *blk,
BlockAIOCB *dma_blk_write(BlockBackend *blk,
QEMUSGList *sg, uint64_t offset, uint32_t align,
BlockCompletionFunc *cb, void *opaque);
-uint64_t dma_buf_read(void *ptr, int32_t len, QEMUSGList *sg);
+uint64_t dma_buf_read(void *ptr, int32_t len, QEMUSGList *sg, MemTxAttrs
attrs);
uint64_t dma_buf_write(void *ptr, int32_t len, QEMUSGList *sg, MemTxAttrs
attrs);
void dma_acct_start(BlockBackend *blk, BlockAcctCookie *cookie,
diff --git a/hw/ide/ahci.c b/hw/ide/ahci.c
index 079d2977f23..205dfdc6622 100644
--- a/hw/ide/ahci.c
+++ b/hw/ide/ahci.c
@@ -1386,7 +1386,7 @@ static void ahci_pio_transfer(const IDEDMA *dma)
if (is_write) {
dma_buf_write(s->data_ptr, size, &s->sg, attrs);
} else {
- dma_buf_read(s->data_ptr, size, &s->sg);
+ dma_buf_read(s->data_ptr, size, &s->sg, attrs);
}
}
@@ -1479,7 +1479,7 @@ static int ahci_dma_rw_buf(const IDEDMA *dma, bool
is_write)
}
if (is_write) {
- dma_buf_read(p, l, &s->sg);
+ dma_buf_read(p, l, &s->sg, MEMTXATTRS_UNSPECIFIED);
} else {
dma_buf_write(p, l, &s->sg, MEMTXATTRS_UNSPECIFIED);
}
diff --git a/hw/nvme/ctrl.c b/hw/nvme/ctrl.c
index e1a531d5d6c..462f79a1f60 100644
--- a/hw/nvme/ctrl.c
+++ b/hw/nvme/ctrl.c
@@ -1152,7 +1152,7 @@ static uint16_t nvme_tx(NvmeCtrl *n, NvmeSg *sg, uint8_t
*ptr, uint32_t len,
if (dir == NVME_TX_DIRECTION_TO_DEVICE) {
residual = dma_buf_write(ptr, len, &sg->qsg, attrs);
} else {
- residual = dma_buf_read(ptr, len, &sg->qsg);
+ residual = dma_buf_read(ptr, len, &sg->qsg, attrs);
}
if (unlikely(residual)) {
diff --git a/hw/scsi/megasas.c b/hw/scsi/megasas.c
index da1c88167ee..fe36de10a21 100644
--- a/hw/scsi/megasas.c
+++ b/hw/scsi/megasas.c
@@ -848,7 +848,7 @@ static int megasas_ctrl_get_info(MegasasState *s,
MegasasCmd *cmd)
MFI_INFO_PDMIX_SATA |
MFI_INFO_PDMIX_LD);
- cmd->iov_size -= dma_buf_read(&info, dcmd_size, &cmd->qsg);
+ cmd->iov_size -= dma_buf_read(&info, dcmd_size, &cmd->qsg,
MEMTXATTRS_UNSPECIFIED);
return MFI_STAT_OK;
}
@@ -878,7 +878,7 @@ static int megasas_mfc_get_defaults(MegasasState *s,
MegasasCmd *cmd)
info.disable_preboot_cli = 1;
info.cluster_disable = 1;
- cmd->iov_size -= dma_buf_read(&info, dcmd_size, &cmd->qsg);
+ cmd->iov_size -= dma_buf_read(&info, dcmd_size, &cmd->qsg,
MEMTXATTRS_UNSPECIFIED);
return MFI_STAT_OK;
}
@@ -899,7 +899,7 @@ static int megasas_dcmd_get_bios_info(MegasasState *s,
MegasasCmd *cmd)
info.expose_all_drives = 1;
}
- cmd->iov_size -= dma_buf_read(&info, dcmd_size, &cmd->qsg);
+ cmd->iov_size -= dma_buf_read(&info, dcmd_size, &cmd->qsg,
MEMTXATTRS_UNSPECIFIED);
return MFI_STAT_OK;
}
@@ -910,7 +910,7 @@ static int megasas_dcmd_get_fw_time(MegasasState *s,
MegasasCmd *cmd)
fw_time = cpu_to_le64(megasas_fw_time());
- cmd->iov_size -= dma_buf_read(&fw_time, dcmd_size, &cmd->qsg);
+ cmd->iov_size -= dma_buf_read(&fw_time, dcmd_size, &cmd->qsg,
MEMTXATTRS_UNSPECIFIED);
return MFI_STAT_OK;
}
@@ -937,7 +937,7 @@ static int megasas_event_info(MegasasState *s, MegasasCmd
*cmd)
info.shutdown_seq_num = cpu_to_le32(s->shutdown_event);
info.boot_seq_num = cpu_to_le32(s->boot_event);
- cmd->iov_size -= dma_buf_read(&info, dcmd_size, &cmd->qsg);
+ cmd->iov_size -= dma_buf_read(&info, dcmd_size, &cmd->qsg,
MEMTXATTRS_UNSPECIFIED);
return MFI_STAT_OK;
}
@@ -1006,7 +1006,7 @@ static int megasas_dcmd_pd_get_list(MegasasState *s,
MegasasCmd *cmd)
info.size = cpu_to_le32(offset);
info.count = cpu_to_le32(num_pd_disks);
- cmd->iov_size -= dma_buf_read(&info, offset, &cmd->qsg);
+ cmd->iov_size -= dma_buf_read(&info, offset, &cmd->qsg,
MEMTXATTRS_UNSPECIFIED);
return MFI_STAT_OK;
}
@@ -1100,7 +1100,7 @@ static int megasas_pd_get_info_submit(SCSIDevice *sdev,
int lun,
info->connected_port_bitmap = 0x1;
info->device_speed = 1;
info->link_speed = 1;
- resid = dma_buf_read(cmd->iov_buf, dcmd_size, &cmd->qsg);
+ resid = dma_buf_read(cmd->iov_buf, dcmd_size, &cmd->qsg,
MEMTXATTRS_UNSPECIFIED);
g_free(cmd->iov_buf);
cmd->iov_size = dcmd_size - resid;
cmd->iov_buf = NULL;
@@ -1172,7 +1172,7 @@ static int megasas_dcmd_ld_get_list(MegasasState *s,
MegasasCmd *cmd)
info.ld_count = cpu_to_le32(num_ld_disks);
trace_megasas_dcmd_ld_get_list(cmd->index, num_ld_disks, max_ld_disks);
- resid = dma_buf_read(&info, dcmd_size, &cmd->qsg);
+ resid = dma_buf_read(&info, dcmd_size, &cmd->qsg, MEMTXATTRS_UNSPECIFIED);
cmd->iov_size = dcmd_size - resid;
return MFI_STAT_OK;
}
@@ -1221,7 +1221,7 @@ static int megasas_dcmd_ld_list_query(MegasasState *s,
MegasasCmd *cmd)
info.size = dcmd_size;
trace_megasas_dcmd_ld_get_list(cmd->index, num_ld_disks, max_ld_disks);
- resid = dma_buf_read(&info, dcmd_size, &cmd->qsg);
+ resid = dma_buf_read(&info, dcmd_size, &cmd->qsg, MEMTXATTRS_UNSPECIFIED);
cmd->iov_size = dcmd_size - resid;
return MFI_STAT_OK;
}
@@ -1271,7 +1271,7 @@ static int megasas_ld_get_info_submit(SCSIDevice *sdev,
int lun,
info->ld_config.span[0].num_blocks = info->size;
info->ld_config.span[0].array_ref = cpu_to_le16(sdev_id);
- resid = dma_buf_read(cmd->iov_buf, dcmd_size, &cmd->qsg);
+ resid = dma_buf_read(cmd->iov_buf, dcmd_size, &cmd->qsg,
MEMTXATTRS_UNSPECIFIED);
g_free(cmd->iov_buf);
cmd->iov_size = dcmd_size - resid;
cmd->iov_buf = NULL;
@@ -1390,7 +1390,7 @@ static int megasas_dcmd_cfg_read(MegasasState *s,
MegasasCmd *cmd)
ld_offset += sizeof(struct mfi_ld_config);
}
- cmd->iov_size -= dma_buf_read(data, info->size, &cmd->qsg);
+ cmd->iov_size -= dma_buf_read(data, info->size, &cmd->qsg,
MEMTXATTRS_UNSPECIFIED);
return MFI_STAT_OK;
}
@@ -1420,7 +1420,7 @@ static int megasas_dcmd_get_properties(MegasasState *s,
MegasasCmd *cmd)
info.ecc_bucket_leak_rate = cpu_to_le16(1440);
info.expose_encl_devices = 1;
- cmd->iov_size -= dma_buf_read(&info, dcmd_size, &cmd->qsg);
+ cmd->iov_size -= dma_buf_read(&info, dcmd_size, &cmd->qsg,
MEMTXATTRS_UNSPECIFIED);
return MFI_STAT_OK;
}
diff --git a/hw/scsi/scsi-bus.c b/hw/scsi/scsi-bus.c
index 64a506a3975..2b5e9dca311 100644
--- a/hw/scsi/scsi-bus.c
+++ b/hw/scsi/scsi-bus.c
@@ -1421,7 +1421,7 @@ void scsi_req_data(SCSIRequest *req, int len)
buf = scsi_req_get_buf(req);
if (req->cmd.mode == SCSI_XFER_FROM_DEV) {
- req->resid = dma_buf_read(buf, len, req->sg);
+ req->resid = dma_buf_read(buf, len, req->sg, MEMTXATTRS_UNSPECIFIED);
} else {
req->resid = dma_buf_write(buf, len, req->sg, MEMTXATTRS_UNSPECIFIED);
}
diff --git a/softmmu/dma-helpers.c b/softmmu/dma-helpers.c
index 2f1a241b81a..a391773c296 100644
--- a/softmmu/dma-helpers.c
+++ b/softmmu/dma-helpers.c
@@ -316,10 +316,9 @@ static uint64_t dma_buf_rw(void *buf, int32_t len,
QEMUSGList *sg,
return resid;
}
-uint64_t dma_buf_read(void *ptr, int32_t len, QEMUSGList *sg)
+uint64_t dma_buf_read(void *ptr, int32_t len, QEMUSGList *sg, MemTxAttrs attrs)
{
- return dma_buf_rw(ptr, len, sg, DMA_DIRECTION_FROM_DEVICE,
- MEMTXATTRS_UNSPECIFIED);
+ return dma_buf_rw(ptr, len, sg, DMA_DIRECTION_FROM_DEVICE, attrs);
}
uint64_t dma_buf_write(void *ptr, int32_t len, QEMUSGList *sg, MemTxAttrs
attrs)
--
2.33.1
- [PATCH v2 02/23] dma: Let dma_memory_set() take MemTxAttrs argument, (continued)
- [PATCH v2 02/23] dma: Let dma_memory_set() take MemTxAttrs argument, Philippe Mathieu-Daudé, 2021/12/23
- [PATCH v2 03/23] dma: Let dma_memory_rw_relaxed() take MemTxAttrs argument, Philippe Mathieu-Daudé, 2021/12/23
- [PATCH v2 04/23] dma: Let dma_memory_rw() take MemTxAttrs argument, Philippe Mathieu-Daudé, 2021/12/23
- [PATCH v2 06/23] dma: Let dma_memory_map() take MemTxAttrs argument, Philippe Mathieu-Daudé, 2021/12/23
- [PATCH v2 05/23] dma: Let dma_memory_read/write() take MemTxAttrs argument, Philippe Mathieu-Daudé, 2021/12/23
- [PATCH v2 07/23] dma: Have dma_buf_rw() take a void pointer, Philippe Mathieu-Daudé, 2021/12/23
- [PATCH v2 08/23] dma: Have dma_buf_read() / dma_buf_write() take a void pointer, Philippe Mathieu-Daudé, 2021/12/23
- [PATCH v2 09/23] dma: Let pci_dma_rw() take MemTxAttrs argument, Philippe Mathieu-Daudé, 2021/12/23
- [PATCH v2 10/23] dma: Let dma_buf_rw() take MemTxAttrs argument, Philippe Mathieu-Daudé, 2021/12/23
- [PATCH v2 11/23] dma: Let dma_buf_write() take MemTxAttrs argument, Philippe Mathieu-Daudé, 2021/12/23
- [PATCH v2 12/23] dma: Let dma_buf_read() take MemTxAttrs argument,
Philippe Mathieu-Daudé <=
- [PATCH v2 13/23] dma: Let dma_buf_rw() propagate MemTxResult, Philippe Mathieu-Daudé, 2021/12/23
- [PATCH v2 14/23] dma: Let dma_buf_read() / dma_buf_write() propagate MemTxResult, Philippe Mathieu-Daudé, 2021/12/23
- [PATCH v2 15/23] dma: Let st*_dma() take MemTxAttrs argument, Philippe Mathieu-Daudé, 2021/12/23
- [PATCH v2 16/23] dma: Let ld*_dma() take MemTxAttrs argument, Philippe Mathieu-Daudé, 2021/12/23
- [PATCH v2 17/23] dma: Let st*_dma() propagate MemTxResult, Philippe Mathieu-Daudé, 2021/12/23
- [PATCH v2 18/23] dma: Let ld*_dma() propagate MemTxResult, Philippe Mathieu-Daudé, 2021/12/23
- [PATCH v2 19/23] hw/scsi/megasas: Use uint32_t for reply queue head/tail values, Philippe Mathieu-Daudé, 2021/12/23
- [PATCH v2 20/23] pci: Let st*_pci_dma() take MemTxAttrs argument, Philippe Mathieu-Daudé, 2021/12/23
- [PATCH v2 21/23] pci: Let ld*_pci_dma() take MemTxAttrs argument, Philippe Mathieu-Daudé, 2021/12/23