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[PULL 006/101] target/ppc: Implement Vector Expand Mask
From: |
Cédric Le Goater |
Subject: |
[PULL 006/101] target/ppc: Implement Vector Expand Mask |
Date: |
Thu, 16 Dec 2021 21:24:39 +0100 |
From: Matheus Ferst <matheus.ferst@eldorado.org.br>
Implement the following PowerISA v3.1 instructions:
vexpandbm: Vector Expand Byte Mask
vexpandhm: Vector Expand Halfword Mask
vexpandwm: Vector Expand Word Mask
vexpanddm: Vector Expand Doubleword Mask
vexpandqm: Vector Expand Quadword Mask
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20211203194229.746275-2-matheus.ferst@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
target/ppc/insn32.decode | 11 ++++++++++
target/ppc/translate/vmx-impl.c.inc | 34 +++++++++++++++++++++++++++++
2 files changed, 45 insertions(+)
diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode
index e135b8aba417..9a28f1d266bb 100644
--- a/target/ppc/insn32.decode
+++ b/target/ppc/insn32.decode
@@ -56,6 +56,9 @@
&VX_uim4 vrt uim vrb
@VX_uim4 ...... vrt:5 . uim:4 vrb:5 ........... &VX_uim4
+&VX_tb vrt vrb
+@VX_tb ...... vrt:5 ..... vrb:5 ........... &VX_tb
+
&X rt ra rb
@X ...... rt:5 ra:5 rb:5 .......... . &X
@@ -408,6 +411,14 @@ VINSWVRX 000100 ..... ..... ..... 00110001111 @VX
VSLDBI 000100 ..... ..... ..... 00 ... 010110 @VN
VSRDBI 000100 ..... ..... ..... 01 ... 010110 @VN
+## Vector Mask Manipulation Instructions
+
+VEXPANDBM 000100 ..... 00000 ..... 11001000010 @VX_tb
+VEXPANDHM 000100 ..... 00001 ..... 11001000010 @VX_tb
+VEXPANDWM 000100 ..... 00010 ..... 11001000010 @VX_tb
+VEXPANDDM 000100 ..... 00011 ..... 11001000010 @VX_tb
+VEXPANDQM 000100 ..... 00100 ..... 11001000010 @VX_tb
+
# VSX Load/Store Instructions
LXV 111101 ..... ..... ............ . 001 @DQ_TSX
diff --git a/target/ppc/translate/vmx-impl.c.inc
b/target/ppc/translate/vmx-impl.c.inc
index 8eb8d3a06720..ebb048432369 100644
--- a/target/ppc/translate/vmx-impl.c.inc
+++ b/target/ppc/translate/vmx-impl.c.inc
@@ -1491,6 +1491,40 @@ static bool trans_VSRDBI(DisasContext *ctx, arg_VN *a)
return true;
}
+static bool do_vexpand(DisasContext *ctx, arg_VX_tb *a, unsigned vece)
+{
+ REQUIRE_INSNS_FLAGS2(ctx, ISA310);
+ REQUIRE_VECTOR(ctx);
+
+ tcg_gen_gvec_sari(vece, avr_full_offset(a->vrt), avr_full_offset(a->vrb),
+ (8 << vece) - 1, 16, 16);
+
+ return true;
+}
+
+TRANS(VEXPANDBM, do_vexpand, MO_8)
+TRANS(VEXPANDHM, do_vexpand, MO_16)
+TRANS(VEXPANDWM, do_vexpand, MO_32)
+TRANS(VEXPANDDM, do_vexpand, MO_64)
+
+static bool trans_VEXPANDQM(DisasContext *ctx, arg_VX_tb *a)
+{
+ TCGv_i64 tmp;
+
+ REQUIRE_INSNS_FLAGS2(ctx, ISA310);
+ REQUIRE_VECTOR(ctx);
+
+ tmp = tcg_temp_new_i64();
+
+ get_avr64(tmp, a->vrb, true);
+ tcg_gen_sari_i64(tmp, tmp, 63);
+ set_avr64(a->vrt, tmp, false);
+ set_avr64(a->vrt, tmp, true);
+
+ tcg_temp_free_i64(tmp);
+ return true;
+}
+
#define GEN_VAFORM_PAIRED(name0, name1, opc2) \
static void glue(gen_, name0##_##name1)(DisasContext *ctx) \
{ \
--
2.31.1
- [PULL 007/101] target/ppc: Implement Vector Extract Mask, (continued)
- [PULL 007/101] target/ppc: Implement Vector Extract Mask, Cédric Le Goater, 2021/12/16
- [PULL 005/101] target/ppc: ppc_store_fpscr doesn't update bits 0 to 28 and 52, Cédric Le Goater, 2021/12/16
- [PULL 004/101] test/tcg/ppc64le: test mtfsf, Cédric Le Goater, 2021/12/16
- [PULL 019/101] Link new ppc-spapr-hcalls.rst file to pseries.rst., Cédric Le Goater, 2021/12/16
- [PULL 027/101] target/ppc: Update float_invalid_op_addsub for new flags, Cédric Le Goater, 2021/12/16
- [PULL 011/101] pci-host: Allow extended config space access for PowerNV PHB4 model, Cédric Le Goater, 2021/12/16
- [PULL 028/101] target/ppc: Update float_invalid_op_mul for new flags, Cédric Le Goater, 2021/12/16
- [PULL 025/101] softfloat: Add flag specific to convert non-nan to int, Cédric Le Goater, 2021/12/16
- [PULL 023/101] softfloat: Add flags specific to Inf / Inf and 0 / 0, Cédric Le Goater, 2021/12/16
- [PULL 014/101] docs/system/ppc/powernv.rst: document KVM support status, Cédric Le Goater, 2021/12/16
- [PULL 006/101] target/ppc: Implement Vector Expand Mask,
Cédric Le Goater <=
- [PULL 026/101] softfloat: Add flag specific to signaling nans, Cédric Le Goater, 2021/12/16
- [PULL 008/101] target/ppc: Implement Vector Mask Move insns, Cédric Le Goater, 2021/12/16
- [PULL 018/101] docs: Rename ppc-spapr-hcalls.txt to ppc-spapr-hcalls.rst., Cédric Le Goater, 2021/12/16
- [PULL 015/101] ppc/pnv.c: fix "system-id" FDT when -uuid is set, Cédric Le Goater, 2021/12/16
- [PULL 020/101] softfloat: Extend float_exception_flags to 16 bits, Cédric Le Goater, 2021/12/16
- [PULL 031/101] target/ppc: Update float_invalid_cvt for new flags, Cédric Le Goater, 2021/12/16
- [PULL 013/101] ppc/pnv.c: add a friendly warning when accel=kvm is used, Cédric Le Goater, 2021/12/16
- [PULL 017/101] docs: rSTify ppc-spapr-hcalls.txt, Cédric Le Goater, 2021/12/16
- [PULL 039/101] target/ppc: Do not call do_float_check_status from do_fmadd, Cédric Le Goater, 2021/12/16
- [PULL 016/101] docs: Introducing pseries documentation., Cédric Le Goater, 2021/12/16