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[PULL 094/102] ppc/pnv: Use QOM hierarchy to scan PHB3 devices
From: |
Cédric Le Goater |
Subject: |
[PULL 094/102] ppc/pnv: Use QOM hierarchy to scan PHB3 devices |
Date: |
Wed, 15 Dec 2021 18:03:49 +0100 |
When -nodefaults is supported for PHB3 devices, the phbs array under
the chip will be empty. This will break the XICSFabric handlers, and
all interrupt delivery, and the 'info pic' HMP command.
Do a QOM loop on the chip children and look for PHB3 devices instead.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-Id: <20211213132830.108372-7-clg@kaod.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
hw/ppc/pnv.c | 72 +++++++++++++++++++++++++++++++++++++++-------------
1 file changed, 54 insertions(+), 18 deletions(-)
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index c97fe77e88e6..e75fc999ee11 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -638,16 +638,25 @@ static ISABus *pnv_isa_create(PnvChip *chip, Error **errp)
return PNV_CHIP_GET_CLASS(chip)->isa_create(chip, errp);
}
+static int pnv_chip_power8_pic_print_info_child(Object *child, void *opaque)
+{
+ Monitor *mon = opaque;
+ PnvPHB3 *phb3 = (PnvPHB3 *) object_dynamic_cast(child, TYPE_PNV_PHB3);
+
+ if (phb3) {
+ pnv_phb3_msi_pic_print_info(&phb3->msis, mon);
+ ics_pic_print_info(&phb3->lsis, mon);
+ }
+ return 0;
+}
+
static void pnv_chip_power8_pic_print_info(PnvChip *chip, Monitor *mon)
{
Pnv8Chip *chip8 = PNV8_CHIP(chip);
- int i;
ics_pic_print_info(&chip8->psi.ics, mon);
- for (i = 0; i < chip->num_phbs; i++) {
- pnv_phb3_msi_pic_print_info(&chip8->phbs[i].msis, mon);
- ics_pic_print_info(&chip8->phbs[i].lsis, mon);
- }
+ object_child_foreach(OBJECT(chip),
+ pnv_chip_power8_pic_print_info_child, mon);
}
static void pnv_chip_power9_pic_print_info(PnvChip *chip, Monitor *mon)
@@ -1789,10 +1798,32 @@ PowerPCCPU *pnv_chip_find_cpu(PnvChip *chip, uint32_t
pir)
return NULL;
}
+typedef struct ForeachPhb3Args {
+ int irq;
+ ICSState *ics;
+} ForeachPhb3Args;
+
+static int pnv_ics_get_child(Object *child, void *opaque)
+{
+ ForeachPhb3Args *args = opaque;
+ PnvPHB3 *phb3 = (PnvPHB3 *) object_dynamic_cast(child, TYPE_PNV_PHB3);
+
+ if (phb3) {
+ if (ics_valid_irq(&phb3->lsis, args->irq)) {
+ args->ics = &phb3->lsis;
+ }
+ if (ics_valid_irq(ICS(&phb3->msis), args->irq)) {
+ args->ics = ICS(&phb3->msis);
+ }
+ }
+ return args->ics ? 1 : 0;
+}
+
static ICSState *pnv_ics_get(XICSFabric *xi, int irq)
{
PnvMachineState *pnv = PNV_MACHINE(xi);
- int i, j;
+ ForeachPhb3Args args = { irq, NULL };
+ int i;
for (i = 0; i < pnv->num_chips; i++) {
PnvChip *chip = pnv->chips[i];
@@ -1801,32 +1832,37 @@ static ICSState *pnv_ics_get(XICSFabric *xi, int irq)
if (ics_valid_irq(&chip8->psi.ics, irq)) {
return &chip8->psi.ics;
}
- for (j = 0; j < chip->num_phbs; j++) {
- if (ics_valid_irq(&chip8->phbs[j].lsis, irq)) {
- return &chip8->phbs[j].lsis;
- }
- if (ics_valid_irq(ICS(&chip8->phbs[j].msis), irq)) {
- return ICS(&chip8->phbs[j].msis);
- }
+
+ object_child_foreach(OBJECT(chip), pnv_ics_get_child, &args);
+ if (args.ics) {
+ return args.ics;
}
}
return NULL;
}
+static int pnv_ics_resend_child(Object *child, void *opaque)
+{
+ PnvPHB3 *phb3 = (PnvPHB3 *) object_dynamic_cast(child, TYPE_PNV_PHB3);
+
+ if (phb3) {
+ ics_resend(&phb3->lsis);
+ ics_resend(ICS(&phb3->msis));
+ }
+ return 0;
+}
+
static void pnv_ics_resend(XICSFabric *xi)
{
PnvMachineState *pnv = PNV_MACHINE(xi);
- int i, j;
+ int i;
for (i = 0; i < pnv->num_chips; i++) {
PnvChip *chip = pnv->chips[i];
Pnv8Chip *chip8 = PNV8_CHIP(pnv->chips[i]);
ics_resend(&chip8->psi.ics);
- for (j = 0; j < chip->num_phbs; j++) {
- ics_resend(&chip8->phbs[j].lsis);
- ics_resend(ICS(&chip8->phbs[j].msis));
- }
+ object_child_foreach(OBJECT(chip), pnv_ics_resend_child, NULL);
}
}
--
2.31.1
- [PULL 085/102] target/ppc: PMU: update counters on MMCR1 write, (continued)
- [PULL 085/102] target/ppc: PMU: update counters on MMCR1 write, Cédric Le Goater, 2021/12/15
- [PULL 080/102] Revert "target/ppc: Move SPR_DSISR setting to powerpc_excp", Cédric Le Goater, 2021/12/15
- [PULL 072/102] ppc/ppc405: Change default PLL values at reset, Cédric Le Goater, 2021/12/15
- [PULL 077/102] target/ppc: fix xscvqpdp register access, Cédric Le Goater, 2021/12/15
- [PULL 091/102] ppc/pnv: Use the chip class to check the index of PHB3 devices, Cédric Le Goater, 2021/12/15
- [PULL 079/102] target/ppc: Fix e6500 boot, Cédric Le Goater, 2021/12/15
- [PULL 099/102] ppc/pnv: Compute the PHB index from the PHB4 PEC model, Cédric Le Goater, 2021/12/15
- [PULL 097/102] ppc/pnv: Introduce a "chip" property under the PHB4 model, Cédric Le Goater, 2021/12/15
- [PULL 088/102] target/ppc/power8-pmu.c: add PM_RUN_INST_CMPL (0xFA) event, Cédric Le Goater, 2021/12/15
- [PULL 096/102] ppc/pnv: Introduce version and device_id class atributes for PHB4 devices, Cédric Le Goater, 2021/12/15
- [PULL 094/102] ppc/pnv: Use QOM hierarchy to scan PHB3 devices,
Cédric Le Goater <=
- [PULL 090/102] ppc/pnv: Introduce a "chip" property under PHB3, Cédric Le Goater, 2021/12/15
- [PULL 089/102] PPC64/TCG: Implement 'rfebb' instruction, Cédric Le Goater, 2021/12/15
- [PULL 087/102] target/ppc: enable PMU instruction count, Cédric Le Goater, 2021/12/15
- [PULL 101/102] ppc/pnv: Move realize of PEC stacks under the PEC model, Cédric Le Goater, 2021/12/15
- [PULL 095/102] ppc/pnv: Introduce a num_pecs class attribute for PHB4 PEC devices, Cédric Le Goater, 2021/12/15
- [PULL 061/102] ppc/ppc405: Change kernel load address, Cédric Le Goater, 2021/12/15
- [PULL 081/102] target/ppc: do not silence SNaN in xscvspdpn, Cédric Le Goater, 2021/12/15
- [PULL 092/102] ppc/pnv: Drop the "num-phbs" property, Cédric Le Goater, 2021/12/15
- [PULL 076/102] target/ppc: Move xs{max,min}[cj]dp to decodetree, Cédric Le Goater, 2021/12/15
- [PULL 083/102] target/ppc: PMU basic cycle count for pseries TCG, Cédric Le Goater, 2021/12/15