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[PATCH v2 05/19] ppc/pnv: Move mapping of the PHB3 CQ regions under pnv_
From: |
Cédric Le Goater |
Subject: |
[PATCH v2 05/19] ppc/pnv: Move mapping of the PHB3 CQ regions under pnv_pbcq_realize() |
Date: |
Mon, 13 Dec 2021 14:28:16 +0100 |
This change will help us providing support for user created PHB3
devices.
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
hw/pci-host/pnv_phb3_pbcq.c | 11 +++++++++++
hw/ppc/pnv.c | 12 ------------
2 files changed, 11 insertions(+), 12 deletions(-)
diff --git a/hw/pci-host/pnv_phb3_pbcq.c b/hw/pci-host/pnv_phb3_pbcq.c
index a0526aa1eca3..c7426cd27a20 100644
--- a/hw/pci-host/pnv_phb3_pbcq.c
+++ b/hw/pci-host/pnv_phb3_pbcq.c
@@ -284,6 +284,17 @@ static void pnv_pbcq_realize(DeviceState *dev, Error
**errp)
pnv_xscom_region_init(&pbcq->xscom_spci_regs, OBJECT(dev),
&pnv_pbcq_spci_xscom_ops, pbcq, name,
PNV_XSCOM_PBCQ_SPCI_SIZE);
+
+ /* Populate the XSCOM address space. */
+ pnv_xscom_add_subregion(phb->chip,
+ PNV_XSCOM_PBCQ_NEST_BASE + 0x400 * phb->phb_id,
+ &pbcq->xscom_nest_regs);
+ pnv_xscom_add_subregion(phb->chip,
+ PNV_XSCOM_PBCQ_PCI_BASE + 0x400 * phb->phb_id,
+ &pbcq->xscom_pci_regs);
+ pnv_xscom_add_subregion(phb->chip,
+ PNV_XSCOM_PBCQ_SPCI_BASE + 0x040 * phb->phb_id,
+ &pbcq->xscom_spci_regs);
}
static int pnv_pbcq_dt_xscom(PnvXScomInterface *dev, void *fdt,
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index 0413d221b311..65196a2a5d00 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -1226,7 +1226,6 @@ static void pnv_chip_power8_realize(DeviceState *dev,
Error **errp)
/* PHB3 controllers */
for (i = 0; i < chip->num_phbs; i++) {
PnvPHB3 *phb = &chip8->phbs[i];
- PnvPBCQState *pbcq = &phb->pbcq;
object_property_set_int(OBJECT(phb), "index", i, &error_fatal);
object_property_set_int(OBJECT(phb), "chip-id", chip->chip_id,
@@ -1236,17 +1235,6 @@ static void pnv_chip_power8_realize(DeviceState *dev,
Error **errp)
if (!sysbus_realize(SYS_BUS_DEVICE(phb), errp)) {
return;
}
-
- /* Populate the XSCOM address space. */
- pnv_xscom_add_subregion(chip,
- PNV_XSCOM_PBCQ_NEST_BASE + 0x400 * phb->phb_id,
- &pbcq->xscom_nest_regs);
- pnv_xscom_add_subregion(chip,
- PNV_XSCOM_PBCQ_PCI_BASE + 0x400 * phb->phb_id,
- &pbcq->xscom_pci_regs);
- pnv_xscom_add_subregion(chip,
- PNV_XSCOM_PBCQ_SPCI_BASE + 0x040 * phb->phb_id,
- &pbcq->xscom_spci_regs);
}
}
--
2.31.1
- [PATCH v2 00/19] ppc/pnv: Add support for user created PHB3/PHB4 devices, Cédric Le Goater, 2021/12/13
- [PATCH v2 08/19] ppc/pnv: Introduce version and device_id class atributes for PHB4 devices, Cédric Le Goater, 2021/12/13
- [PATCH v2 02/19] ppc/pnv: Introduce a "chip" property under PHB3, Cédric Le Goater, 2021/12/13
- [PATCH v2 06/19] ppc/pnv: Use QOM hierarchy to scan PHB3 devices, Cédric Le Goater, 2021/12/13
- [PATCH v2 12/19] ppc/pnv: Remove "system-memory" property from PHB4 PEC, Cédric Le Goater, 2021/12/13
- [PATCH v2 10/19] ppc/pnv: Introduce a num_stack class attribute, Cédric Le Goater, 2021/12/13
- [PATCH v2 11/19] ppc/pnv: Compute the PHB index from the PHB4 PEC model, Cédric Le Goater, 2021/12/13
- [PATCH v2 05/19] ppc/pnv: Move mapping of the PHB3 CQ regions under pnv_pbcq_realize(),
Cédric Le Goater <=
- [PATCH v2 03/19] ppc/pnv: Use the chip class to check the index of PHB3 devices, Cédric Le Goater, 2021/12/13
- [PATCH v2 14/19] ppc/pnv: Use QOM hierarchy to scan PEC PHB4 devices, Cédric Le Goater, 2021/12/13
- [PATCH v2 01/19] ppc/pnv: Change the maximum of PHB3 devices for Power8NVL, Cédric Le Goater, 2021/12/13
- [PATCH v2 15/19] ppc/pnv: Introduce support for user created PHB3 devices, Cédric Le Goater, 2021/12/13
- [PATCH v2 16/19] ppc/pnv: Reparent user created PHB3 devices to the PnvChip, Cédric Le Goater, 2021/12/13
- [PATCH v2 13/19] ppc/pnv: Move realize of PEC stacks under the PEC model, Cédric Le Goater, 2021/12/13
- [PATCH v2 18/19] ppc/pnv: Introduce support for user created PHB4 devices, Cédric Le Goater, 2021/12/13