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[PATCH v5 18/26] hw/i386/pc: Account for SGX EPC sections when calculati
From: |
Paolo Bonzini |
Subject: |
[PATCH v5 18/26] hw/i386/pc: Account for SGX EPC sections when calculating device memory |
Date: |
Fri, 24 Sep 2021 13:25:01 +0200 |
From: Sean Christopherson <sean.j.christopherson@intel.com>
Add helpers to detect if SGX EPC exists above 4g, and if so, where SGX
EPC above 4g ends. Use the helpers to adjust the device memory range
if SGX EPC exists above 4g.
For multiple virtual EPC sections, we just put them together physically
contiguous for the simplicity because we don't support EPC NUMA affinity
now. Once the SGX EPC NUMA support in the kernel SGX driver, we will
support this in the future.
Note that SGX EPC is currently hardcoded to reside above 4g.
Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
Signed-off-by: Yang Zhong <yang.zhong@intel.com>
Message-Id: <20210719112136.57018-18-yang.zhong@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/i386/pc.c | 11 ++++++++++-
include/hw/i386/sgx-epc.h | 7 +++++++
2 files changed, 17 insertions(+), 1 deletion(-)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 7e523b913c..58700af138 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -913,8 +913,15 @@ void pc_memory_init(PCMachineState *pcms,
exit(EXIT_FAILURE);
}
+ if (pcms->sgx_epc.size != 0) {
+ machine->device_memory->base =
sgx_epc_above_4g_end(&pcms->sgx_epc);
+ } else {
+ machine->device_memory->base =
+ 0x100000000ULL + x86ms->above_4g_mem_size;
+ }
+
machine->device_memory->base =
- ROUND_UP(0x100000000ULL + x86ms->above_4g_mem_size, 1 * GiB);
+ ROUND_UP(machine->device_memory->base, 1 * GiB);
if (pcmc->enforce_aligned_dimm) {
/* size device region assuming 1G page max alignment per slot */
@@ -999,6 +1006,8 @@ uint64_t pc_pci_hole64_start(void)
if (!pcmc->broken_reserved_end) {
hole64_start += memory_region_size(&ms->device_memory->mr);
}
+ } else if (pcms->sgx_epc.size != 0) {
+ hole64_start = sgx_epc_above_4g_end(&pcms->sgx_epc);
} else {
hole64_start = 0x100000000ULL + x86ms->above_4g_mem_size;
}
diff --git a/include/hw/i386/sgx-epc.h b/include/hw/i386/sgx-epc.h
index 75b19f464c..65a68ca753 100644
--- a/include/hw/i386/sgx-epc.h
+++ b/include/hw/i386/sgx-epc.h
@@ -57,4 +57,11 @@ typedef struct SGXEPCState {
int sgx_epc_get_section(int section_nr, uint64_t *addr, uint64_t *size);
+static inline uint64_t sgx_epc_above_4g_end(SGXEPCState *sgx_epc)
+{
+ assert(sgx_epc != NULL && sgx_epc->base >= 0x100000000ULL);
+
+ return sgx_epc->base + sgx_epc->size;
+}
+
#endif
--
2.31.1
- [PATCH v5 04/26] qom: Add memory-backend-epc ObjectOptions support, (continued)
- [PATCH v5 04/26] qom: Add memory-backend-epc ObjectOptions support, Paolo Bonzini, 2021/09/24
- [PATCH v5 09/26] i386: Add SGX CPUID leaf FEAT_SGX_12_0_EBX, Paolo Bonzini, 2021/09/24
- [PATCH v5 10/26] i386: Add SGX CPUID leaf FEAT_SGX_12_1_EAX, Paolo Bonzini, 2021/09/24
- [PATCH v5 12/26] i386: Add feature control MSR dependency when SGX is enabled, Paolo Bonzini, 2021/09/24
- [PATCH v5 13/26] i386: Update SGX CPUID info according to hardware/KVM/user input, Paolo Bonzini, 2021/09/24
- [PATCH v5 15/26] i386: Propagate SGX CPUID sub-leafs to KVM, Paolo Bonzini, 2021/09/24
- [PATCH v5 05/26] i386: Add 'sgx-epc' device to expose EPC sections to guest, Paolo Bonzini, 2021/09/24
- [PATCH v5 16/26] Adjust min CPUID level to 0x12 when SGX is enabled, Paolo Bonzini, 2021/09/24
- [PATCH v5 18/26] hw/i386/pc: Account for SGX EPC sections when calculating device memory,
Paolo Bonzini <=
- [PATCH v5 11/26] i386: Add get/set/migrate support for SGX_LEPUBKEYHASH MSRs, Paolo Bonzini, 2021/09/24
- [PATCH v5 03/26] hostmem: Add hostmem-epc as a backend for SGX EPC, Paolo Bonzini, 2021/09/24
- [PATCH v5 07/26] i386: Add primary SGX CPUID and MSR defines, Paolo Bonzini, 2021/09/24
- [PATCH v5 08/26] i386: Add SGX CPUID leaf FEAT_SGX_12_0_EAX, Paolo Bonzini, 2021/09/24
- [PATCH v5 14/26] i386: kvm: Add support for exposing PROVISIONKEY to guest, Paolo Bonzini, 2021/09/24
- [PATCH v5 17/26] hw/i386/fw_cfg: Set SGX bits in feature control fw_cfg accordingly, Paolo Bonzini, 2021/09/24
- [PATCH v5 20/26] i386: acpi: Add SGX EPC entry to ACPI tables, Paolo Bonzini, 2021/09/24
- [PATCH v5 21/26] q35: Add support for SGX EPC, Paolo Bonzini, 2021/09/24
- [PATCH v5 19/26] i386/pc: Add e820 entry for SGX EPC section(s), Paolo Bonzini, 2021/09/24