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Re: [PATCH v2 23/30] tcg/loongarch64: Add softmmu load/store helpers, i
From: |
Richard Henderson |
Subject: |
Re: [PATCH v2 23/30] tcg/loongarch64: Add softmmu load/store helpers, implement qemu_ld/qemu_st ops |
Date: |
Wed, 22 Sep 2021 09:29:14 -0700 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.13.0 |
On 9/21/21 1:19 PM, WANG Xuerui wrote:
+ /* Compare masked address with the TLB entry. */
+ label_ptr[0] = s->code_ptr;
+ tcg_out_opc_bne(s, TCG_REG_TMP0, TCG_REG_TMP1, 0);
+
+ /* TLB Hit - translate address using addend. */
+ tcg_out_opc_add_d(s, TCG_REG_TMP0, TCG_REG_TMP2, addrl);
You removed a little too much here. You still need
if (TARGET_LONG_BITS == 32) {
tcg_out_ext32u(s, TCG_REG_TMP0, addrl);
addrl = TCG_REG_TMP0;
}
tcg_out_opc_add_d(s, TCG_REG_TMP0, TCG_REG_TMP2, addrl);
+static void add_qemu_ldst_label(TCGContext *s, int is_ld, TCGMemOpIdx oi,
+ TCGReg datalo, TCGReg addrlo,
+ void *raddr, tcg_insn_unit **label_ptr)
+{
+ TCGLabelQemuLdst *label = new_ldst_label(s);
+
+ label->is_ld = is_ld;
+ label->oi = oi;
+ label->type = 0;
Type should be set based on "is_64" argument to tcg_out_qemu_ld (or indeed, is_64 could be
replaced by "type", which would probably make more sense).
This will be used to fix...
+ if (opc & MO_SIGN) {
+ /* Sign-extend directly into destination. */
+ switch (size) {
+ case MO_8:
+ tcg_out_ext8s(s, l->datalo_reg, TCG_REG_A0);
+ break;
+ case MO_16:
+ tcg_out_ext16s(s, l->datalo_reg, TCG_REG_A0);
+ break;
+ case MO_32:
+ tcg_out_ext32s(s, l->datalo_reg, TCG_REG_A0);
+ break;
+ default:
+ g_assert_not_reached();
+ break;
+ }
+ } else {
+ tcg_out_mov(s, size == MO_64, l->datalo_reg, TCG_REG_A0);
+ }
... this, where TCG_TYPE_I32 loads should always be sign-extended from 32-bits. Something
like
switch (opc & MO_SSIZE) {
case MO_SB:
ext8s;
break;
case MO_SH:
ext16s;
break;
case MO_SL:
ext32s;
break;
case MO_UL:
if (type == TCG_TYPE_I32) {
ext32s;
break;
}
/* fall through */
default:
tcg_out_mov(s, TCG_TYPE_REG, datalo, A0);
break;
}
+ case MO_64:
+ tcg_out_mov(s, TCG_TYPE_PTR, TCG_REG_A2, l->datalo_reg);
TCG_TYPE_I64, to match MO_64.
+ if (USE_GUEST_BASE) {
+ tcg_out_opc_add_d(s, base, TCG_GUEST_BASE_REG, addr_regl);
+ } else {
+ tcg_out_opc_add_d(s, base, addr_regl, TCG_REG_ZERO);
+ }
Still adding zero in tcg_out_qemu_st.
r~
- Re: [PATCH v2 14/30] tcg/loongarch64: Implement bswap32_i32/bswap32_i64/bswap64_i64, (continued)
- [PATCH v2 17/30] tcg/loongarch64: Implement add/sub ops, WANG Xuerui, 2021/09/21
- [PATCH v2 21/30] tcg/loongarch64: Implement tcg_out_call, WANG Xuerui, 2021/09/21
- [PATCH v2 22/30] tcg/loongarch64: Implement simple load/store ops, WANG Xuerui, 2021/09/21
- [PATCH v2 19/30] tcg/loongarch64: Implement br/brcond ops, WANG Xuerui, 2021/09/21
- [PATCH v2 24/30] tcg/loongarch64: Implement tcg_target_qemu_prologue, WANG Xuerui, 2021/09/21
- [PATCH v2 23/30] tcg/loongarch64: Add softmmu load/store helpers, implement qemu_ld/qemu_st ops, WANG Xuerui, 2021/09/21
- Re: [PATCH v2 23/30] tcg/loongarch64: Add softmmu load/store helpers, implement qemu_ld/qemu_st ops,
Richard Henderson <=
- [PATCH v2 16/30] tcg/loongarch64: Implement shl/shr/sar/rotl/rotr ops, WANG Xuerui, 2021/09/21
- [PATCH v2 20/30] tcg/loongarch64: Implement setcond ops, WANG Xuerui, 2021/09/21
- [PATCH v2 25/30] tcg/loongarch64: Implement exit_tb/goto_tb, WANG Xuerui, 2021/09/21
- [PATCH v2 26/30] tcg/loongarch64: Implement tcg_target_init, WANG Xuerui, 2021/09/21
- [PATCH v2 30/30] configure, meson.build: Mark support for loongarch64 hosts, WANG Xuerui, 2021/09/21