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[PATCH v2 00/41] linux-user: Streamline handling of SIGSEGV
From: |
Richard Henderson |
Subject: |
[PATCH v2 00/41] linux-user: Streamline handling of SIGSEGV |
Date: |
Sat, 18 Sep 2021 11:44:46 -0700 |
Based-on: 20210915174951.1852266-1-richard.henderson@linaro.org
("linux-user/nios2: trap and kuser fixes")
... which itself is
Based-on: 20210813131809.28655-1-peter.maydell@linaro.org
("linux-user: Clean up siginfo_t handling for arm, aarch64")
... for force_sig_fault().
and in turn based on my current tcg-next pull, for has_work changes.
For avoidance of doubt:
https://gitlab.com/rth7680/qemu/-/commits/lu-hostsig-2
Only 4 of 20 targets need any special code for correctly
signalling SIGSEGV, and the host-level code is reduced as well.
Dropped the rfc, but still seeking feedback the factorization.
r~
Richard Henderson (41):
accel/tcg: Split out adjust_signal_pc
accel/tcg: Move clear_helper_retaddr to cpu loop
accel/tcg: Split out handle_sigsegv_accerr_write
accel/tcg: Fold cpu_exit_tb_from_sighandler into caller
configure: Merge riscv32 and riscv64 host architectures
linux-user: Reorg handling for SIGSEGV
linux-user/host/x86: Populate host_signal.h
linux-user/host/ppc: Populate host_signal.h
linux-user/host/alpha: Populate host_signal.h
linux-user/host/sparc: Populate host_signal.h
linux-user/host/arm: Populate host_signal.h
linux-user/host/aarch64: Populate host_signal.h
linux-user/host/s390: Populate host_signal.h
linux-user/host/mips: Populate host_signal.h
linux-user/host/riscv: Populate host_signal.h
target/arm: Fixup comment re handle_cpu_signal
linux-user/host/riscv: Improve host_signal_write
linux-user/signal: Drop HOST_SIGNAL_PLACEHOLDER
hw/core: Add TCGCPUOps.record_sigsegv
linux-user: Add raise_sigsegv
target/alpha: Make alpha_cpu_tlb_fill sysemu only
target/arm: Use raise_sigsegv for mte tag lookup
target/arm: Implement arm_cpu_record_sigsegv
target/cris: Make cris_cpu_tlb_fill sysemu only
target/hexagon: Remove hexagon_cpu_tlb_fill
target/hppa: Make hppa_cpu_tlb_fill sysemu only
target/i386: Implement x86_cpu_record_sigsegv
target/m68k: Make m68k_cpu_tlb_fill sysemu only
target/microblaze: Make mb_cpu_tlb_fill sysemu only
target/mips: Make mips_cpu_tlb_fill sysemu only
target/nios2: Make nios2_cpu_tlb_fill sysemu only
linux-user/openrisc: Adjust signal for EXCP_RANGE, EXCP_FPE
target/openrisc: Make openrisc_cpu_tlb_fill sysemu only
target/ppc: Implement ppc_cpu_record_sigsegv
target/riscv: Make riscv_cpu_tlb_fill sysemu only
target/s390x: Use probe_access_flags in s390_probe_access
target/s390x: Implement s390_cpu_record_sigsegv
target/sh4: Make sh4_cpu_tlb_fill sysemu only
target/sparc: Make sparc_cpu_tlb_fill sysemu only
target/xtensa: Make xtensa_cpu_tlb_fill sysemu only
accel/tcg: Restrict TCGCPUOps::tlb_fill() to sysemu
configure | 8 +-
meson.build | 4 +-
include/exec/exec-all.h | 41 +-
include/hw/core/tcg-cpu-ops.h | 48 +-
linux-user/host/aarch64/host-signal.h | 73 ++
linux-user/host/alpha/host-signal.h | 41 +
linux-user/host/arm/host-signal.h | 29 +
linux-user/host/i386/host-signal.h | 24 +
linux-user/host/mips/host-signal.h | 61 ++
linux-user/host/ppc/host-signal.h | 24 +
linux-user/host/ppc64/host-signal.h | 1 +
linux-user/host/riscv/host-signal.h | 57 ++
linux-user/host/{riscv64 => riscv}/hostdep.h | 4 +-
linux-user/host/riscv32/hostdep.h | 11 -
linux-user/host/s390/host-signal.h | 92 ++
linux-user/host/s390x/host-signal.h | 1 +
linux-user/host/sparc/host-signal.h | 53 ++
linux-user/host/sparc64/host-signal.h | 1 +
linux-user/host/x32/host-signal.h | 1 +
linux-user/host/x86_64/host-signal.h | 24 +
target/alpha/cpu.h | 7 +-
target/arm/internals.h | 6 +
target/cris/cpu.h | 8 +-
target/hppa/cpu.h | 2 +-
target/i386/tcg/helper-tcg.h | 6 +
target/microblaze/cpu.h | 8 +-
target/mips/tcg/tcg-internal.h | 7 +-
target/openrisc/cpu.h | 7 +-
target/ppc/cpu.h | 3 -
target/ppc/internal.h | 9 +
target/s390x/s390x-internal.h | 13 +-
target/sh4/cpu.h | 6 +-
target/xtensa/cpu.h | 2 +-
accel/tcg/cpu-exec.c | 3 +-
accel/tcg/user-exec.c | 832 ++----------------
linux-user/alpha/cpu_loop.c | 8 -
linux-user/cris/cpu_loop.c | 10 -
linux-user/hexagon/cpu_loop.c | 24 +-
linux-user/hppa/cpu_loop.c | 16 -
linux-user/m68k/cpu_loop.c | 10 -
linux-user/microblaze/cpu_loop.c | 10 -
linux-user/mips/cpu_loop.c | 11 -
linux-user/nios2/cpu_loop.c | 10 -
linux-user/openrisc/cpu_loop.c | 18 +-
linux-user/riscv/cpu_loop.c | 7 -
linux-user/s390x/cpu_loop.c | 14 +-
linux-user/sh4/cpu_loop.c | 8 -
linux-user/signal.c | 117 ++-
linux-user/sparc/cpu_loop.c | 25 -
linux-user/xtensa/cpu_loop.c | 9 -
target/alpha/cpu.c | 2 +-
target/alpha/helper.c | 13 +-
target/arm/cpu.c | 6 +-
target/arm/cpu_tcg.c | 6 +-
target/arm/mte_helper.c | 6 +-
target/arm/sve_helper.c | 2 +-
target/arm/tlb_helper.c | 36 +-
target/cris/cpu.c | 4 +-
target/cris/helper.c | 18 -
target/hexagon/cpu.c | 23 -
target/hppa/cpu.c | 2 +-
target/hppa/mem_helper.c | 15 -
target/i386/tcg/tcg-cpu.c | 3 +-
target/i386/tcg/user/excp_helper.c | 23 +-
target/m68k/cpu.c | 2 +-
target/m68k/helper.c | 6 +-
target/microblaze/cpu.c | 2 +-
target/microblaze/helper.c | 13 +-
target/mips/cpu.c | 2 +-
target/mips/tcg/user/tlb_helper.c | 59 --
target/nios2/cpu.c | 2 +-
target/nios2/helper.c | 8 -
target/openrisc/cpu.c | 2 +-
target/openrisc/mmu.c | 8 -
target/ppc/cpu_init.c | 6 +-
target/ppc/user_only_helper.c | 15 +-
target/riscv/cpu.c | 2 +-
target/riscv/cpu_helper.c | 21 +-
target/s390x/cpu.c | 6 +-
target/s390x/tcg/excp_helper.c | 18 +-
target/s390x/tcg/mem_helper.c | 18 +-
target/sh4/cpu.c | 2 +-
target/sh4/helper.c | 9 +-
target/sparc/cpu.c | 2 +-
target/sparc/mmu_helper.c | 25 -
target/xtensa/cpu.c | 2 +-
target/xtensa/helper.c | 22 +-
.../{riscv64 => riscv}/safe-syscall.inc.S | 0
target/cris/meson.build | 7 +-
target/hppa/meson.build | 6 +-
target/mips/tcg/meson.build | 3 -
target/mips/tcg/user/meson.build | 3 -
target/openrisc/meson.build | 2 +-
target/sparc/meson.build | 2 +-
94 files changed, 910 insertions(+), 1338 deletions(-)
create mode 100644 linux-user/host/aarch64/host-signal.h
create mode 100644 linux-user/host/alpha/host-signal.h
create mode 100644 linux-user/host/arm/host-signal.h
create mode 100644 linux-user/host/i386/host-signal.h
create mode 100644 linux-user/host/mips/host-signal.h
create mode 100644 linux-user/host/ppc/host-signal.h
create mode 100644 linux-user/host/ppc64/host-signal.h
create mode 100644 linux-user/host/riscv/host-signal.h
rename linux-user/host/{riscv64 => riscv}/hostdep.h (94%)
delete mode 100644 linux-user/host/riscv32/hostdep.h
create mode 100644 linux-user/host/s390/host-signal.h
create mode 100644 linux-user/host/s390x/host-signal.h
create mode 100644 linux-user/host/sparc/host-signal.h
create mode 100644 linux-user/host/sparc64/host-signal.h
create mode 100644 linux-user/host/x32/host-signal.h
create mode 100644 linux-user/host/x86_64/host-signal.h
delete mode 100644 target/mips/tcg/user/tlb_helper.c
rename linux-user/host/{riscv64 => riscv}/safe-syscall.inc.S (100%)
delete mode 100644 target/mips/tcg/user/meson.build
--
2.25.1
- [PATCH v2 00/41] linux-user: Streamline handling of SIGSEGV,
Richard Henderson <=
- [PATCH v2 01/41] accel/tcg: Split out adjust_signal_pc, Richard Henderson, 2021/09/18
- [PATCH v2 03/41] accel/tcg: Split out handle_sigsegv_accerr_write, Richard Henderson, 2021/09/18
- [PATCH v2 02/41] accel/tcg: Move clear_helper_retaddr to cpu loop, Richard Henderson, 2021/09/18
- [PATCH v2 05/41] configure: Merge riscv32 and riscv64 host architectures, Richard Henderson, 2021/09/18
- [PATCH v2 04/41] accel/tcg: Fold cpu_exit_tb_from_sighandler into caller, Richard Henderson, 2021/09/18
- [PATCH v2 08/41] linux-user/host/ppc: Populate host_signal.h, Richard Henderson, 2021/09/18