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[PULL 16/23] hw/arm/virt: add ITS support in virt GIC
From: |
Peter Maydell |
Subject: |
[PULL 16/23] hw/arm/virt: add ITS support in virt GIC |
Date: |
Mon, 13 Sep 2021 17:11:37 +0100 |
From: Shashi Mallela <shashi.mallela@linaro.org>
Included creation of ITS as part of virt platform GIC
initialization. This Emulated ITS model now co-exists with kvm
ITS and is enabled in absence of kvm irq kernel support in a
platform.
Signed-off-by: Shashi Mallela <shashi.mallela@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20210910143951.92242-9-shashi.mallela@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
include/hw/arm/virt.h | 2 ++
target/arm/kvm_arm.h | 4 ++--
hw/arm/virt.c | 29 +++++++++++++++++++++++++++--
3 files changed, 31 insertions(+), 4 deletions(-)
diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
index 9661c466996..b461b8d261d 100644
--- a/include/hw/arm/virt.h
+++ b/include/hw/arm/virt.h
@@ -120,6 +120,7 @@ struct VirtMachineClass {
MachineClass parent;
bool disallow_affinity_adjustment;
bool no_its;
+ bool no_tcg_its;
bool no_pmu;
bool claim_edge_triggered_timers;
bool smbios_old_sys_ver;
@@ -141,6 +142,7 @@ struct VirtMachineState {
bool highmem;
bool highmem_ecam;
bool its;
+ bool tcg_its;
bool virt;
bool ras;
bool mte;
diff --git a/target/arm/kvm_arm.h b/target/arm/kvm_arm.h
index 34f8daa3775..06134549759 100644
--- a/target/arm/kvm_arm.h
+++ b/target/arm/kvm_arm.h
@@ -525,8 +525,8 @@ static inline const char *its_class_name(void)
/* KVM implementation requires this capability */
return kvm_direct_msi_enabled() ? "arm-its-kvm" : NULL;
} else {
- /* Software emulation is not implemented yet */
- return NULL;
+ /* Software emulation based model */
+ return "arm-gicv3-its";
}
}
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 73e9c6bb7cb..1d59f0e59f7 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -584,6 +584,12 @@ static void create_its(VirtMachineState *vms)
const char *itsclass = its_class_name();
DeviceState *dev;
+ if (!strcmp(itsclass, "arm-gicv3-its")) {
+ if (!vms->tcg_its) {
+ itsclass = NULL;
+ }
+ }
+
if (!itsclass) {
/* Do nothing if not supported */
return;
@@ -621,7 +627,7 @@ static void create_v2m(VirtMachineState *vms)
vms->msi_controller = VIRT_MSI_CTRL_GICV2M;
}
-static void create_gic(VirtMachineState *vms)
+static void create_gic(VirtMachineState *vms, MemoryRegion *mem)
{
MachineState *ms = MACHINE(vms);
/* We create a standalone GIC */
@@ -655,6 +661,14 @@ static void create_gic(VirtMachineState *vms)
nb_redist_regions);
qdev_prop_set_uint32(vms->gic, "redist-region-count[0]",
redist0_count);
+ if (!kvm_irqchip_in_kernel()) {
+ if (vms->tcg_its) {
+ object_property_set_link(OBJECT(vms->gic), "sysmem",
+ OBJECT(mem), &error_fatal);
+ qdev_prop_set_bit(vms->gic, "has-lpi", true);
+ }
+ }
+
if (nb_redist_regions == 2) {
uint32_t redist1_capacity =
vms->memmap[VIRT_HIGH_GIC_REDIST2].size /
GICV3_REDIST_SIZE;
@@ -2039,7 +2053,7 @@ static void machvirt_init(MachineState *machine)
virt_flash_fdt(vms, sysmem, secure_sysmem ?: sysmem);
- create_gic(vms);
+ create_gic(vms, sysmem);
virt_cpu_post_init(vms, sysmem);
@@ -2742,6 +2756,12 @@ static void virt_instance_init(Object *obj)
} else {
/* Default allows ITS instantiation */
vms->its = true;
+
+ if (vmc->no_tcg_its) {
+ vms->tcg_its = false;
+ } else {
+ vms->tcg_its = true;
+ }
}
/* Default disallows iommu instantiation */
@@ -2791,8 +2811,13 @@ DEFINE_VIRT_MACHINE_AS_LATEST(6, 2)
static void virt_machine_6_1_options(MachineClass *mc)
{
+ VirtMachineClass *vmc = VIRT_MACHINE_CLASS(OBJECT_CLASS(mc));
+
virt_machine_6_2_options(mc);
compat_props_add(mc->compat_props, hw_compat_6_1, hw_compat_6_1_len);
+
+ /* qemu ITS was introduced with 6.2 */
+ vmc->no_tcg_its = true;
}
DEFINE_VIRT_MACHINE(6, 1)
--
2.20.1
- [PULL 06/23] hw/char: cadence_uart: Log a guest error when device is unclocked or in reset, (continued)
- [PULL 06/23] hw/char: cadence_uart: Log a guest error when device is unclocked or in reset, Peter Maydell, 2021/09/13
- [PULL 07/23] hw/arm/virt: KVM: Probe for KVM_CAP_ARM_VM_IPA_SIZE when creating scratch VM, Peter Maydell, 2021/09/13
- [PULL 08/23] hw/arm: Add support for kudo-bmc board., Peter Maydell, 2021/09/13
- [PULL 09/23] hw/intc: GICv3 ITS initial framework, Peter Maydell, 2021/09/13
- [PULL 11/23] hw/intc: GICv3 ITS command queue framework, Peter Maydell, 2021/09/13
- [PULL 10/23] hw/intc: GICv3 ITS register definitions added, Peter Maydell, 2021/09/13
- [PULL 15/23] tests/data/acpi/virt: Add IORT files for ITS, Peter Maydell, 2021/09/13
- [PULL 13/23] hw/intc: GICv3 ITS Feature enablement, Peter Maydell, 2021/09/13
- [PULL 14/23] hw/intc: GICv3 redistributor ITS processing, Peter Maydell, 2021/09/13
- [PULL 18/23] target/arm: Take an exception if PSTATE.IL is set, Peter Maydell, 2021/09/13
- [PULL 16/23] hw/arm/virt: add ITS support in virt GIC,
Peter Maydell <=
- [PULL 12/23] hw/intc: GICv3 ITS Command processing, Peter Maydell, 2021/09/13
- [PULL 17/23] tests/data/acpi/virt: Update IORT files for ITS, Peter Maydell, 2021/09/13
- [PULL 19/23] target/arm: Merge disas_a64_insn into aarch64_tr_translate_insn, Peter Maydell, 2021/09/13
- [PULL 20/23] qdev: Support marking individual buses as 'full', Peter Maydell, 2021/09/13
- [PULL 21/23] hw/arm/mps2-tz.c: Add extra data parameter to MakeDevFn, Peter Maydell, 2021/09/13
- [PULL 23/23] hw/arm/mps2.c: Mark internal-only I2C buses as 'full', Peter Maydell, 2021/09/13
- [PULL 22/23] hw/arm/mps2-tz.c: Mark internal-only I2C buses as 'full', Peter Maydell, 2021/09/13