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[PATCH v9 10/11] arm: tcg: Adhere to SMCCC 1.3 section 5.2
From: |
Alexander Graf |
Subject: |
[PATCH v9 10/11] arm: tcg: Adhere to SMCCC 1.3 section 5.2 |
Date: |
Mon, 13 Sep 2021 01:07:56 +0200 |
The SMCCC 1.3 spec section 5.2 says
The Unknown SMC Function Identifier is a sign-extended value of (-1)
that is returned in the R0, W0 or X0 registers. An implementation must
return this error code when it receives:
* An SMC or HVC call with an unknown Function Identifier
* An SMC or HVC call for a removed Function Identifier
* An SMC64/HVC64 call from AArch32 state
To comply with these statements, let's always return -1 when we encounter
an unknown HVC or SMC call.
Signed-off-by: Alexander Graf <agraf@csgraf.de>
---
v8 -> v9:
- Remove Windows specifics and just comply with SMCCC spec
---
target/arm/psci.c | 26 ++------------------------
1 file changed, 2 insertions(+), 24 deletions(-)
diff --git a/target/arm/psci.c b/target/arm/psci.c
index 6709e28013..bee4aa8825 100644
--- a/target/arm/psci.c
+++ b/target/arm/psci.c
@@ -35,7 +35,6 @@ bool arm_is_psci_call(ARMCPU *cpu, int excp_type)
* to EL2 or to EL3).
*/
CPUARMState *env = &cpu->env;
- uint64_t param = is_a64(env) ? env->xregs[0] : env->regs[0];
switch (excp_type) {
case EXCP_HVC:
@@ -52,27 +51,7 @@ bool arm_is_psci_call(ARMCPU *cpu, int excp_type)
return false;
}
- switch (param) {
- case QEMU_PSCI_0_2_FN_PSCI_VERSION:
- case QEMU_PSCI_0_2_FN_MIGRATE_INFO_TYPE:
- case QEMU_PSCI_0_2_FN_AFFINITY_INFO:
- case QEMU_PSCI_0_2_FN64_AFFINITY_INFO:
- case QEMU_PSCI_0_2_FN_SYSTEM_RESET:
- case QEMU_PSCI_0_2_FN_SYSTEM_OFF:
- case QEMU_PSCI_0_1_FN_CPU_ON:
- case QEMU_PSCI_0_2_FN_CPU_ON:
- case QEMU_PSCI_0_2_FN64_CPU_ON:
- case QEMU_PSCI_0_1_FN_CPU_OFF:
- case QEMU_PSCI_0_2_FN_CPU_OFF:
- case QEMU_PSCI_0_1_FN_CPU_SUSPEND:
- case QEMU_PSCI_0_2_FN_CPU_SUSPEND:
- case QEMU_PSCI_0_2_FN64_CPU_SUSPEND:
- case QEMU_PSCI_0_1_FN_MIGRATE:
- case QEMU_PSCI_0_2_FN_MIGRATE:
- return true;
- default:
- return false;
- }
+ return true;
}
void arm_handle_psci_call(ARMCPU *cpu)
@@ -194,10 +173,9 @@ void arm_handle_psci_call(ARMCPU *cpu)
break;
case QEMU_PSCI_0_1_FN_MIGRATE:
case QEMU_PSCI_0_2_FN_MIGRATE:
+ default:
ret = QEMU_PSCI_RET_NOT_SUPPORTED;
break;
- default:
- g_assert_not_reached();
}
err:
--
2.30.1 (Apple Git-130)
- [PATCH v9 00/11] hvf: Implement Apple Silicon Support, Alexander Graf, 2021/09/12
- [PATCH v9 01/11] arm: Move PMC register definitions to cpu.h, Alexander Graf, 2021/09/12
- [PATCH v9 02/11] hvf: Add execute to dirty log permission bitmap, Alexander Graf, 2021/09/12
- [PATCH v9 03/11] hvf: Introduce hvf_arch_init() callback, Alexander Graf, 2021/09/12
- [PATCH v9 05/11] arm/hvf: Add a WFI handler, Alexander Graf, 2021/09/12
- [PATCH v9 04/11] hvf: Add Apple Silicon support, Alexander Graf, 2021/09/12
- [PATCH v9 08/11] arm: Add Hypervisor.framework build target, Alexander Graf, 2021/09/12
- [PATCH v9 10/11] arm: tcg: Adhere to SMCCC 1.3 section 5.2,
Alexander Graf <=
- [PATCH v9 09/11] hvf: arm: Add rudimentary PMC support, Alexander Graf, 2021/09/12
- [PATCH v9 06/11] hvf: arm: Implement -cpu host, Alexander Graf, 2021/09/12
- [PATCH v9 07/11] hvf: arm: Implement PSCI handling, Alexander Graf, 2021/09/12