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[PATCH v2 14/24] target/mips: Restrict cpu_exec_interrupt() handler to s
From: |
Philippe Mathieu-Daudé |
Subject: |
[PATCH v2 14/24] target/mips: Restrict cpu_exec_interrupt() handler to sysemu |
Date: |
Sun, 5 Sep 2021 01:55:32 +0200 |
Restrict cpu_exec_interrupt() and its callees to sysemu.
Reviewed-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
target/mips/tcg/tcg-internal.h | 5 +++--
target/mips/cpu.c | 2 +-
target/mips/tcg/exception.c | 18 ------------------
target/mips/tcg/sysemu/tlb_helper.c | 18 ++++++++++++++++++
target/mips/tcg/user/tlb_helper.c | 5 -----
5 files changed, 22 insertions(+), 26 deletions(-)
diff --git a/target/mips/tcg/tcg-internal.h b/target/mips/tcg/tcg-internal.h
index 81b14eb219e..c7a77ddccdd 100644
--- a/target/mips/tcg/tcg-internal.h
+++ b/target/mips/tcg/tcg-internal.h
@@ -18,8 +18,6 @@
void mips_tcg_init(void);
void mips_cpu_synchronize_from_tb(CPUState *cs, const TranslationBlock *tb);
-void mips_cpu_do_interrupt(CPUState *cpu);
-bool mips_cpu_exec_interrupt(CPUState *cpu, int int_req);
bool mips_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
MMUAccessType access_type, int mmu_idx,
bool probe, uintptr_t retaddr);
@@ -41,6 +39,9 @@ static inline void QEMU_NORETURN
do_raise_exception(CPUMIPSState *env,
#if !defined(CONFIG_USER_ONLY)
+void mips_cpu_do_interrupt(CPUState *cpu);
+bool mips_cpu_exec_interrupt(CPUState *cpu, int int_req);
+
void mmu_init(CPUMIPSState *env, const mips_def_t *def);
void update_pagemask(CPUMIPSState *env, target_ulong arg1, int32_t *pagemask);
diff --git a/target/mips/cpu.c b/target/mips/cpu.c
index d426918291a..00e0c55d0e4 100644
--- a/target/mips/cpu.c
+++ b/target/mips/cpu.c
@@ -539,10 +539,10 @@ static const struct SysemuCPUOps mips_sysemu_ops = {
static const struct TCGCPUOps mips_tcg_ops = {
.initialize = mips_tcg_init,
.synchronize_from_tb = mips_cpu_synchronize_from_tb,
- .cpu_exec_interrupt = mips_cpu_exec_interrupt,
.tlb_fill = mips_cpu_tlb_fill,
#if !defined(CONFIG_USER_ONLY)
+ .cpu_exec_interrupt = mips_cpu_exec_interrupt,
.do_interrupt = mips_cpu_do_interrupt,
.do_transaction_failed = mips_cpu_do_transaction_failed,
.do_unaligned_access = mips_cpu_do_unaligned_access,
diff --git a/target/mips/tcg/exception.c b/target/mips/tcg/exception.c
index 4fb8b00711d..7b3026b105b 100644
--- a/target/mips/tcg/exception.c
+++ b/target/mips/tcg/exception.c
@@ -86,24 +86,6 @@ void mips_cpu_synchronize_from_tb(CPUState *cs, const
TranslationBlock *tb)
env->hflags |= tb->flags & MIPS_HFLAG_BMASK;
}
-bool mips_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
-{
- if (interrupt_request & CPU_INTERRUPT_HARD) {
- MIPSCPU *cpu = MIPS_CPU(cs);
- CPUMIPSState *env = &cpu->env;
-
- if (cpu_mips_hw_interrupts_enabled(env) &&
- cpu_mips_hw_interrupts_pending(env)) {
- /* Raise it */
- cs->exception_index = EXCP_EXT_INTERRUPT;
- env->error_code = 0;
- mips_cpu_do_interrupt(cs);
- return true;
- }
- }
- return false;
-}
-
static const char * const excp_names[EXCP_LAST + 1] = {
[EXCP_RESET] = "reset",
[EXCP_SRESET] = "soft reset",
diff --git a/target/mips/tcg/sysemu/tlb_helper.c
b/target/mips/tcg/sysemu/tlb_helper.c
index a150a014ec1..73254d19298 100644
--- a/target/mips/tcg/sysemu/tlb_helper.c
+++ b/target/mips/tcg/sysemu/tlb_helper.c
@@ -1339,6 +1339,24 @@ void mips_cpu_do_interrupt(CPUState *cs)
cs->exception_index = EXCP_NONE;
}
+bool mips_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
+{
+ if (interrupt_request & CPU_INTERRUPT_HARD) {
+ MIPSCPU *cpu = MIPS_CPU(cs);
+ CPUMIPSState *env = &cpu->env;
+
+ if (cpu_mips_hw_interrupts_enabled(env) &&
+ cpu_mips_hw_interrupts_pending(env)) {
+ /* Raise it */
+ cs->exception_index = EXCP_EXT_INTERRUPT;
+ env->error_code = 0;
+ mips_cpu_do_interrupt(cs);
+ return true;
+ }
+ }
+ return false;
+}
+
void r4k_invalidate_tlb(CPUMIPSState *env, int idx, int use_extra)
{
CPUState *cs = env_cpu(env);
diff --git a/target/mips/tcg/user/tlb_helper.c
b/target/mips/tcg/user/tlb_helper.c
index b835144b820..210c6d529ef 100644
--- a/target/mips/tcg/user/tlb_helper.c
+++ b/target/mips/tcg/user/tlb_helper.c
@@ -57,8 +57,3 @@ bool mips_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
raise_mmu_exception(env, address, access_type);
do_raise_exception_err(env, cs->exception_index, env->error_code, retaddr);
}
-
-void mips_cpu_do_interrupt(CPUState *cs)
-{
- cs->exception_index = EXCP_NONE;
-}
--
2.31.1
- [PATCH v2 07/24] target/arm: Restrict cpu_exec_interrupt() handler to sysemu, (continued)
- [PATCH v2 07/24] target/arm: Restrict cpu_exec_interrupt() handler to sysemu, Philippe Mathieu-Daudé, 2021/09/04
- [PATCH v2 08/24] target/cris: Restrict cpu_exec_interrupt() handler to sysemu, Philippe Mathieu-Daudé, 2021/09/04
- [PATCH v2 09/24] target/hppa: Restrict cpu_exec_interrupt() handler to sysemu, Philippe Mathieu-Daudé, 2021/09/04
- [PATCH v2 10/24] target/i386: Restrict cpu_exec_interrupt() handler to sysemu, Philippe Mathieu-Daudé, 2021/09/04
- [PATCH v2 11/24] target/i386: Move x86_cpu_exec_interrupt() under sysemu/ folder, Philippe Mathieu-Daudé, 2021/09/04
- [PATCH v2 12/24] target/m68k: Restrict cpu_exec_interrupt() handler to sysemu, Philippe Mathieu-Daudé, 2021/09/04
- [PATCH v2 13/24] target/microblaze: Restrict cpu_exec_interrupt() handler to sysemu, Philippe Mathieu-Daudé, 2021/09/04
- [PATCH v2 15/24] target/nios2: Restrict cpu_exec_interrupt() handler to sysemu, Philippe Mathieu-Daudé, 2021/09/04
- [PATCH v2 14/24] target/mips: Restrict cpu_exec_interrupt() handler to sysemu,
Philippe Mathieu-Daudé <=
- [PATCH v2 16/24] target/openrisc: Restrict cpu_exec_interrupt() handler to sysemu, Philippe Mathieu-Daudé, 2021/09/04
- [PATCH v2 17/24] target/ppc: Restrict cpu_exec_interrupt() handler to sysemu, Philippe Mathieu-Daudé, 2021/09/04
- [PATCH v2 18/24] target/riscv: Restrict cpu_exec_interrupt() handler to sysemu, Philippe Mathieu-Daudé, 2021/09/04
- [PATCH v2 19/24] target/sh4: Restrict cpu_exec_interrupt() handler to sysemu, Philippe Mathieu-Daudé, 2021/09/04
- [PATCH v2 20/24] target/sparc: Restrict cpu_exec_interrupt() handler to sysemu, Philippe Mathieu-Daudé, 2021/09/04
- [PATCH v2 21/24] target/rx: Restrict cpu_exec_interrupt() handler to sysemu, Philippe Mathieu-Daudé, 2021/09/04
- [PATCH v2 22/24] target/xtensa: Restrict cpu_exec_interrupt() handler to sysemu, Philippe Mathieu-Daudé, 2021/09/04
- [PATCH v2 23/24] accel/tcg: Restrict TCGCPUOps::cpu_exec_interrupt() to sysemu, Philippe Mathieu-Daudé, 2021/09/04
- [PATCH v2 24/24] user: Remove cpu_get_pic_interrupt() stubs, Philippe Mathieu-Daudé, 2021/09/04