Re: [PATCH] target/mips: fix emulation of nanoMIPS BPOSGE32 instruction

[Philippe Mathieu-Daudé]

Hi Filip and Aleksandar,

On 6/15/21 7:33 PM, Philippe Mathieu-Daudé wrote:
> On 6/15/21 7:22 PM, Aleksandar Rikalo wrote:
>> Per the "MIPS® Architecture Extension: nanoMIPS32 DSP Technical
>> Reference Manual — Revision 0.04" p. 88 "BPOSGE32C", offset argument (imm)
>> should be left-shifted first.
>> This change was tested against test_dsp_r1_bposge32.c DSP test.
> 
> Thank you! Could you add a job to run these tests on the mainstream CI?
> You simply need to open a GitLab account, add your job (probably in
> .gitlab-ci.d/buildtest.yml) and push your branch to test it.

One week passed, so I'll proceed with the MIPS pull request without
these tests. If you want to send them later, they are still welcomed!

Regards,

Phil.

>> Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com>
>> Signed-off-by: Filip Vidojevic <filip.vidojevic@syrmia.com>
> 
> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> 
>> ---
>>  target/mips/tcg/translate.c | 2 +-
>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/target/mips/tcg/translate.c b/target/mips/tcg/translate.c
>> index 797eba4434..2d0a723061 100644
>> --- a/target/mips/tcg/translate.c
>> +++ b/target/mips/tcg/translate.c
>> @@ -21137,7 +21137,7 @@ static int
>> decode_nanomips_32_48_opc(CPUMIPSState *env, DisasContext *ctx)
>>                                        extract32(ctx->opcode, 0, 1) << 13;
>>  
>>                          gen_compute_branch_nm(ctx, OPC_BPOSGE32, 4, -1, -2,
>> -                                              imm);
>> +                                              imm << 1);
>>                      }
>>                      break;
>>                  default:
>> -- 
>> 2.25.1
>