[PATCH] target/mips: Fix TCG temporary leaks in gen_pool32a5_nanomips_insn()

[Philippe Mathieu-Daudé]

Fix a pair of TCG temporary leak when translating nanoMIPS SHILO opcode.

Fixes: 3285a3e4445 ("target/mips: Add emulation of DSP ASE for nanoMIPS")
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 target/mips/tcg/translate.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/target/mips/tcg/translate.c b/target/mips/tcg/translate.c
index c03a8ae1fed..84c71a75c76 100644
--- a/target/mips/tcg/translate.c
+++ b/target/mips/tcg/translate.c
@@ -20177,16 +20177,18 @@ static void gen_pool32a5_nanomips_insn(DisasContext 
*ctx, int opc,
         {
             TCGv tv0 = tcg_temp_new();
             TCGv tv1 = tcg_temp_new();
             int16_t imm = extract32(ctx->opcode, 16, 7);
 
             tcg_gen_movi_tl(tv0, rd >> 3);
             tcg_gen_movi_tl(tv1, imm);
             gen_helper_shilo(tv0, tv1, cpu_env);
+            tcg_temp_free(tv1);
+            tcg_temp_free(tv0);
         }
         break;
     case NM_MULEQ_S_W_PHL:
         check_dsp(ctx);
         gen_helper_muleq_s_w_phl(v1_t, v1_t, v2_t, cpu_env);
         gen_store_gpr(v1_t, ret);
         break;
     case NM_MULEQ_S_W_PHR:
-- 
2.26.3