Re: [PATCH] tcg/aarch64/tcg-target.c.inc: correction of rotate bit number

[Richard Henderson]

On 5/25/21 2:46 AM, Yasuo Kuwahara wrote:
> The last argument of tcg_out_extr() must be in the range 0-31 if ext==0.
>
> Before the fix, when m==0 it becomes 32 and it crashes with an Illegal 
> instruction in Apple Silicon.
>
> After the fix, it will be 0. If m is in the range 1-31, it is the same as 
> before.
>
>
> Signed-off-by: Yasuo Kuwahara <kwhr00@gmail.com <mailto:kwhr00@gmail.com>>
>
> ---
>
> tcg/aarch64/tcg-target.c.inc | 5 ++---
>
> 1 file changed, 2 insertions(+), 3 deletions(-)

(1) All patches go to qemu-devel, as per
    https://wiki.qemu.org/Contribute/SubmitAPatch
    Many maintainers including myself don't monitor qemu-trivial.

(2) Something is wrong with your mailer and it is adding extra
    newlines, which means the patch does not apply.  However,
    because the patch is so simple, I have applied it by hand.

Queued to tcg-next, thanks.


r~

> diff --git a/tcg/aarch64/tcg-target.c.inc b/tcg/aarch64/tcg-target.c.inc
>
> index f07ba98aa4..5bd366f2d4 100644
>
> --- a/tcg/aarch64/tcg-target.c.inc
>
> +++ b/tcg/aarch64/tcg-target.c.inc
>
> @@ -1291,9 +1291,8 @@ static inline void tcg_out_rotr(TCGContext *s, TCGType 
> ext,
>
> static inline void tcg_out_rotl(TCGContext *s, TCGType ext,
>
> TCGReg rd, TCGReg rn, unsigned int m)
>
> {
>
> -int bits = ext ? 64 : 32;
>
> -int max = bits - 1;
>
> -tcg_out_extr(s, ext, rd, rn, rn, bits - (m & max));
>
> +int max = ext ? 63 : 31;
>
> +tcg_out_extr(s, ext, rd, rn, rn, -m & max);
>
> }
>
> static inline void tcg_out_dep(TCGContext *s, TCGType ext, TCGReg rd,
>
> --
>
> 2.24.3