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Re: [PATCHv2] target/arm: make pointer authentication a switchable featu


From: Richard Henderson
Subject: Re: [PATCHv2] target/arm: make pointer authentication a switchable feature
Date: Tue, 25 May 2021 07:26:06 -0700
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.8.1

On 5/25/21 2:01 AM, Jamie Iles wrote:
Rather than having pointer authentication properties be specific to the
max CPU type, turn this into a generic feature that can be set for each
CPU model.  This means that for future CPU types the feature can be set
without having the ID_AA64ISAR1 bits clobbered in
arm_cpu_pauth_finalize.  This also makes it possible for real CPU models
to use the impdef algorithm for improved performance by setting
pauth-impdef=on on the command line.

Cc: Richard Henderson <richard.henderson@linaro.org>
Cc: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Jamie Iles <jamie@nuviainc.com>
---

Following Richard's suggestion to make impdef selectable for all CPUs
where pointer auth is supported, I've moved this up to a full feature
and then any future CPUs supporting pointer auth can just set
ARM_FEATURE_PAUTH.

New patches should not be in-reply-to another thread.
They get lost that way.

      bool prop_pauth;
      bool prop_pauth_impdef;
+    bool has_pauth;

What's this for?  It doesn't even seem to be used in this patch.

@@ -2115,6 +2116,7 @@ enum arm_features {
      ARM_FEATURE_M_SECURITY, /* M profile Security Extension */
      ARM_FEATURE_M_MAIN, /* M profile Main Extension */
      ARM_FEATURE_V8_1M, /* M profile extras only in v8.1M and later */
+    ARM_FEATURE_PAUTH, /* has pointer authentication support */
  };
static inline int arm_feature(CPUARMState *env, int feature)
diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c
index f42803ecaf1d..5a4386ce9218 100644
--- a/target/arm/cpu64.c
+++ b/target/arm/cpu64.c
@@ -760,10 +760,7 @@ static void aarch64_max_initfn(Object *obj)
          cpu->ctr = 0x80038003; /* 32 byte I and D cacheline size, VIPT icache 
*/
          cpu->dcz_blocksize = 7; /*  512 bytes */
  #endif
-
-        /* Default to PAUTH on, with the architected algorithm. */
-        qdev_property_add_static(DEVICE(obj), &arm_cpu_pauth_property);
-        qdev_property_add_static(DEVICE(obj), &arm_cpu_pauth_impdef_property);
+        set_feature(&cpu->env, ARM_FEATURE_PAUTH);

I would rather you split out a function akin to aarch64_add_sve_properties, e.g. aarch64_add_pauth_properties. We would call this function in any cpufoo_initfn that enables pauth. It is hard to say more without the patch that adds the cpufoo_initfn which you are interested in.


+    /* Default to PAUTH on, with the architected algorithm. */
+    if (arm_feature(&cpu->env, ARM_FEATURE_PAUTH)) {

FWIW, this test is

    cpu_isar_feature(aa64_pauth, cpu)

without having to add ARM_FEATURE_PAUTH.


r~



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