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[PATCH v7 23/92] target/arm: Implement SVE2 integer absolute difference
From: |
Richard Henderson |
Subject: |
[PATCH v7 23/92] target/arm: Implement SVE2 integer absolute difference and accumulate |
Date: |
Mon, 24 May 2021 18:02:49 -0700 |
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/sve.decode | 6 ++++++
target/arm/translate-sve.c | 21 +++++++++++++++++++++
2 files changed, 27 insertions(+)
diff --git a/target/arm/sve.decode b/target/arm/sve.decode
index 695a16551e..32b15e4192 100644
--- a/target/arm/sve.decode
+++ b/target/arm/sve.decode
@@ -1266,3 +1266,9 @@ URSRA 01000101 .. 0 ..... 1110 11 ..... .....
@rd_rn_tszimm_shr
SRI 01000101 .. 0 ..... 11110 0 ..... ..... @rd_rn_tszimm_shr
SLI 01000101 .. 0 ..... 11110 1 ..... ..... @rd_rn_tszimm_shl
+
+## SVE2 integer absolute difference and accumulate
+
+# TODO: Use @rda and %reg_movprfx here.
+SABA 01000101 .. 0 ..... 11111 0 ..... ..... @rd_rn_rm
+UABA 01000101 .. 0 ..... 11111 1 ..... ..... @rd_rn_rm
diff --git a/target/arm/translate-sve.c b/target/arm/translate-sve.c
index 5e42ba350e..202107de98 100644
--- a/target/arm/translate-sve.c
+++ b/target/arm/translate-sve.c
@@ -6438,3 +6438,24 @@ static bool trans_SLI(DisasContext *s, arg_rri_esz *a)
{
return do_sve2_fn2i(s, a, gen_gvec_sli);
}
+
+static bool do_sve2_fn_zzz(DisasContext *s, arg_rrr_esz *a, GVecGen3Fn *fn)
+{
+ if (!dc_isar_feature(aa64_sve2, s)) {
+ return false;
+ }
+ if (sve_access_check(s)) {
+ gen_gvec_fn_zzz(s, fn, a->esz, a->rd, a->rn, a->rm);
+ }
+ return true;
+}
+
+static bool trans_SABA(DisasContext *s, arg_rrr_esz *a)
+{
+ return do_sve2_fn_zzz(s, a, gen_gvec_saba);
+}
+
+static bool trans_UABA(DisasContext *s, arg_rrr_esz *a)
+{
+ return do_sve2_fn_zzz(s, a, gen_gvec_uaba);
+}
--
2.25.1
- [PATCH v7 16/92] target/arm: Implement SVE2 bitwise exclusive-or interleaved, (continued)
- [PATCH v7 16/92] target/arm: Implement SVE2 bitwise exclusive-or interleaved, Richard Henderson, 2021/05/24
- [PATCH v7 17/92] target/arm: Implement SVE2 bitwise permute, Richard Henderson, 2021/05/24
- [PATCH v7 15/92] target/arm: Implement SVE2 bitwise shift left long, Richard Henderson, 2021/05/24
- [PATCH v7 18/92] target/arm: Implement SVE2 complex integer add, Richard Henderson, 2021/05/24
- [PATCH v7 19/92] target/arm: Implement SVE2 integer absolute difference and accumulate long, Richard Henderson, 2021/05/24
- [PATCH v7 20/92] target/arm: Implement SVE2 integer add/subtract long with carry, Richard Henderson, 2021/05/24
- [PATCH v7 21/92] target/arm: Implement SVE2 bitwise shift right and accumulate, Richard Henderson, 2021/05/24
- [PATCH v7 28/92] target/arm: Implement SVE2 UQSHRN, UQRSHRN, Richard Henderson, 2021/05/24
- [PATCH v7 22/92] target/arm: Implement SVE2 bitwise shift and insert, Richard Henderson, 2021/05/24
- [PATCH v7 24/92] target/arm: Implement SVE2 saturating extract narrow, Richard Henderson, 2021/05/24
- [PATCH v7 23/92] target/arm: Implement SVE2 integer absolute difference and accumulate,
Richard Henderson <=
- [PATCH v7 26/92] target/arm: Implement SVE2 SHRN, RSHRN, Richard Henderson, 2021/05/24
- [PATCH v7 25/92] target/arm: Implement SVE2 floating-point pairwise, Richard Henderson, 2021/05/24
- [PATCH v7 27/92] target/arm: Implement SVE2 SQSHRUN, SQRSHRUN, Richard Henderson, 2021/05/24
- [PATCH v7 29/92] target/arm: Implement SVE2 SQSHRN, SQRSHRN, Richard Henderson, 2021/05/24
- [PATCH v7 32/92] target/arm: Implement SVE2 bitwise ternary operations, Richard Henderson, 2021/05/24
- [PATCH v7 38/92] target/arm: Implement SVE2 ADDHNB, ADDHNT, Richard Henderson, 2021/05/24
- [PATCH v7 34/92] target/arm: Implement SVE2 saturating multiply-add long, Richard Henderson, 2021/05/24
- [PATCH v7 36/92] target/arm: Implement SVE2 integer multiply-add long, Richard Henderson, 2021/05/24
- [PATCH v7 35/92] target/arm: Implement SVE2 saturating multiply-add high, Richard Henderson, 2021/05/24
- [PATCH v7 30/92] target/arm: Implement SVE2 WHILEGT, WHILEGE, WHILEHI, WHILEHS, Richard Henderson, 2021/05/24