qemu-devel
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [PATCH 3/6] hw/arm/armsse.c: Correct modelling of SSE-300 internal S


From: Richard Henderson
Subject: Re: [PATCH 3/6] hw/arm/armsse.c: Correct modelling of SSE-300 internal SRAMs
Date: Mon, 24 May 2021 06:53:04 -0700
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.8.1

On 5/10/21 12:08 PM, Peter Maydell wrote:
The SSE-300 was not correctly modelling its internal SRAMs:
  * the SRAM address width default is 18
  * the SRAM is mapped at 0x2100_0000, not 0x2000_0000 like
    the SSE-200 and IoTKit

The default address width is no longer guest-visible since
our only SSE-300 board sets it explicitly to a non-default
value, but following the hardware's default will help for
any future boards we need to model.

Reported-by: Devaraj Ranganna<devaraj.ranganna@linaro.org>
Signed-off-by: Peter Maydell<peter.maydell@linaro.org>
---
  hw/arm/armsse.c | 8 ++++++--
  1 file changed, 6 insertions(+), 2 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~



reply via email to

[Prev in Thread] Current Thread [Next in Thread]