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[RFC PATCH 00/25] exec: Add load/store API for aligned pointers
From: |
Philippe Mathieu-Daudé |
Subject: |
[RFC PATCH 00/25] exec: Add load/store API for aligned pointers |
Date: |
Tue, 18 May 2021 20:36:30 +0200 |
Hi,
This series is the result of a chat with Stefan after looking at
Peter response to Bibo on a problem with unoptimized memcpy()
leading to atomic issues:
https://www.mail-archive.com/qemu-devel@nongnu.org/msg808209.html
MIPS R6 (32/64-bit) does support unaligned accesses, but for the
older releases the compiler can't optimize the __builtin_memcpy().
When a pointer is known to be aligned, we can skip the checks for
misalignment and directly access the data. The pair of virtio vring
fields happen to be aligned.
To be able to call the aligned functions from the virtio layer, we
have to fill the gap in multiple API layers.
The series is decomposed as:
- cleanups (1-6)
- clean ldst API using macros (7-13)
- add aligned ldst methods (14)
- add aligned memory methods (15-16)
- similar changes in virtio (17-24)
- use the new methods on vring aligned values (25)
There are some checkpatch errors related to the macro used.
Regards,
Phil.
Philippe Mathieu-Daudé (25):
exec/memory_ldst_cached: Sort declarations
exec/memory_ldst_phys: Sort declarations
exec/memory_ldst: Use correct type sizes
exec/memory_ldst_phys: Use correct type sizes
exec/memory_ldst_cached: Use correct type size
exec/memory: Use correct type size
qemu/bswap: Introduce ST_CONVERT() macro
qemu/bswap: Use ST_CONVERT() macro to emit 16-bit load/store functions
qemu/bswap: Introduce LD_CONVERT() macro
qemu/bswap: Use LD_CONVERT macro to emit 16-bit signed load/store code
qemu/bswap: Use LD_CONVERT macro to emit 16-bit unsigned load/store
code
qemu/bswap: Use LDST_CONVERT macro to emit 32-bit load/store functions
qemu/bswap: Use LDST_CONVERT macro to emit 64-bit load/store functions
qemu/bswap: Introduce load/store for aligned pointer
exec/memory: Add methods for aligned pointer access (address space)
exec/memory: Add methods for aligned pointer access (physical memory)
hw/virtio: Use correct type sizes
hw/virtio: Introduce VIRTIO_LD_CONVERT() macro
hw/virtio: Use LD_CONVERT macro to emit 16-bit unsigned load/store
code
hw/virtio: Introduce VIRTIO_ST_CONVERT() macro
hw/virtio: Use ST_CONVERT() macro to emit 16-bit load/store functions
hw/virtio: Use LDST_CONVERT macro to emit 32-bit load/store functions
hw/virtio: Use LDST_CONVERT macro to emit 64-bit load/store functions
hw/virtio: Add methods for aligned pointer access
hw/virtio: Optimize accesses on vring aligned pointers
docs/devel/loads-stores.rst | 27 +--
include/exec/memory.h | 18 +-
include/hw/virtio/virtio-access.h | 239 +++++++++-----------------
include/qemu/bswap.h | 149 ++++++----------
include/exec/memory_ldst.h.inc | 16 +-
include/exec/memory_ldst_cached.h.inc | 66 ++++---
include/exec/memory_ldst_phys.h.inc | 72 ++++----
hw/virtio/virtio.c | 13 +-
memory_ldst.c.inc | 20 +--
9 files changed, 270 insertions(+), 350 deletions(-)
--
2.26.3
- [RFC PATCH 00/25] exec: Add load/store API for aligned pointers,
Philippe Mathieu-Daudé <=
- [RFC PATCH 01/25] exec/memory_ldst_cached: Sort declarations, Philippe Mathieu-Daudé, 2021/05/18
- [RFC PATCH 03/25] exec/memory_ldst: Use correct type sizes, Philippe Mathieu-Daudé, 2021/05/18
- [RFC PATCH 02/25] exec/memory_ldst_phys: Sort declarations, Philippe Mathieu-Daudé, 2021/05/18
- [RFC PATCH 04/25] exec/memory_ldst_phys: Use correct type sizes, Philippe Mathieu-Daudé, 2021/05/18
- [RFC PATCH 05/25] exec/memory_ldst_cached: Use correct type size, Philippe Mathieu-Daudé, 2021/05/18
- [RFC PATCH 06/25] exec/memory: Use correct type size, Philippe Mathieu-Daudé, 2021/05/18
- [RFC PATCH 08/25] qemu/bswap: Use ST_CONVERT() macro to emit 16-bit load/store functions, Philippe Mathieu-Daudé, 2021/05/18
- [RFC PATCH 07/25] qemu/bswap: Introduce ST_CONVERT() macro, Philippe Mathieu-Daudé, 2021/05/18