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[Bug 1668041] Re: x86 Floating point exceptions - incorrect support?
From: |
Thomas Huth |
Subject: |
[Bug 1668041] Re: x86 Floating point exceptions - incorrect support? |
Date: |
Sat, 08 May 2021 05:37:26 -0000 |
This is an automated cleanup. This bug report has been moved to QEMU's
new bug tracker on gitlab.com and thus gets marked as 'expired' now.
Please continue with the discussion here:
https://gitlab.com/qemu-project/qemu/-/issues/215
** Changed in: qemu
Status: Confirmed => Expired
** Bug watch added: gitlab.com/qemu-project/qemu/-/issues #215
https://gitlab.com/qemu-project/qemu/-/issues/215
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https://bugs.launchpad.net/bugs/1668041
Title:
x86 Floating point exceptions - incorrect support?
Status in QEMU:
Expired
Bug description:
It seems that qemu does not correctly emulate the x86 support for
optionally causing a floating-point exception (#FP) when, for example,
dividing by zero. Reports such as:
https://github.com/cloudius-systems/osv/issues/855
http://stackoverflow.com/questions/15134189/qemu-div-by-zero-mxcsr-register
suggest that setting the exception mask in the fpu cw or mxcsr (e.g.,
using a function like feenableexcept() in the guest OS) does not
generate floating point exceptions on divide by zero. The problem only
happens on pure QEMU - when a QEMU/KVM combination is used, the actual
hardware does the floating point work, and does throw the exception on
divide by zero if so requested.
Looking at the qemu (2.8.0) source code, it seems to me it really
lacks support for generating fpu exceptions: For example,
helper_fdiv() in target-i386/fpu_helper.c, when it notices the divisor
is zero, seems to set the divide-by-zero exception bit, but doesn't
seem to check whether it needs to trigger an exception (when the right
bits on the x87 or SSE control words are enabled).
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