Re: [PULL v2 00/31] target/hexagon patch queue

[Peter Maydell]

On Sun, 2 May 2021 at 15:44, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> The following changes since commit 8f860d2633baf9c2b6261f703f86e394c6bc22ca:
>
>   Merge remote-tracking branch 'remotes/armbru/tags/pull-qapi-2021-04-30' 
> into staging (2021-04-30 16:02:00 +0100)
>
> are available in the Git repository at:
>
>   https://gitlab.com/rth7680/qemu.git tags/pull-hex-20210502
>
> for you to fetch changes up to e628c0156be74dd14a261bbd18674bacd1afcc7d:
>
>   Hexagon (target/hexagon) CABAC decode bin (2021-05-01 16:06:11 -0700)
>
> ----------------------------------------------------------------
> Minor cleanups.
> Finish the rest of the hexagon integer instructions.
>
> ----------------------------------------------------------------
> Taylor Simpson (31):
>       target/hexagon: translation changes
>       target/hexagon: remove unnecessary checks in find_iclass_slots
>       target/hexagon: Change DECODE_MAPPED_REG operand name to OPNUM
>       target/hexagon: fix typo in comment
>       target/hexagon: remove unnecessary semicolons
>       Hexagon (target/hexagon) TCG generation cleanup
>       Hexagon (target/hexagon) cleanup gen_log_predicated_reg_write_pair
>       Hexagon (target/hexagon) remove unnecessary inline directives
>       Hexagon (target/hexagon) use env_archcpu and env_cpu
>       Hexagon (target/hexagon) properly generate TB end for DISAS_NORETURN
>       Hexagon (target/hexagon) decide if pred has been written at TCG gen time
>       Hexagon (target/hexagon) change variables from int to bool when 
> appropriate
>       Hexagon (target/hexagon) remove unused carry_from_add64 function
>       Hexagon (target/hexagon) change type of softfloat_roundingmodes
>       Hexagon (target/hexagon) use softfloat default NaN and tininess
>       Hexagon (target/hexagon) replace float32_mul_pow2 with float32_scalbn
>       Hexagon (target/hexagon) use softfloat for float-to-int conversions
>       Hexagon (target/hexagon) cleanup ternary operators in semantics
>       Hexagon (target/hexagon) cleanup reg_field_info definition
>       Hexagon (target/hexagon) move QEMU_GENERATE to only be on during 
> macros.h
>       Hexagon (target/hexagon) compile all debug code
>       Hexagon (target/hexagon) add F2_sfrecipa instruction
>       Hexagon (target/hexagon) add F2_sfinvsqrta
>       Hexagon (target/hexagon) add A5_ACS (vacsh)
>       Hexagon (target/hexagon) add A6_vminub_RdP
>       Hexagon (target/hexagon) add A4_addp_c/A4_subp_c
>       Hexagon (target/hexagon) circular addressing
>       Hexagon (target/hexagon) bit reverse (brev) addressing
>       Hexagon (target/hexagon) load and unpack bytes instructions
>       Hexagon (target/hexagon) load into shifted register instructions
>       Hexagon (target/hexagon) CABAC decode bin


Applied, thanks.

Please update the changelog at https://wiki.qemu.org/ChangeLog/6.1
for any user-visible changes.

-- PMM