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[PULL 03/36] target/mips: Add missing CP0 check to nanoMIPS RDPGPR / WRP
From: |
Philippe Mathieu-Daudé |
Subject: |
[PULL 03/36] target/mips: Add missing CP0 check to nanoMIPS RDPGPR / WRPGPR opcodes |
Date: |
Sun, 2 May 2021 18:15:05 +0200 |
Per the nanoMIPS32 Instruction Set Technical Reference Manual,
Revision 01.01, Chapter 3. "Instruction Definitions":
The Read/Write Previous GPR opcodes "require CP0 privilege".
Add the missing CP0 checks.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210421185007.2231855-1-f4bug@amsat.org>
---
target/mips/translate.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/target/mips/translate.c b/target/mips/translate.c
index 5dad75cdf37..8a0a2197426 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -18969,9 +18969,11 @@ static void gen_pool32axf_nanomips_insn(CPUMIPSState
*env, DisasContext *ctx)
}
break;
case NM_RDPGPR:
+ check_cp0_enabled(ctx);
gen_load_srsgpr(rs, rt);
break;
case NM_WRPGPR:
+ check_cp0_enabled(ctx);
gen_store_srsgpr(rs, rt);
break;
case NM_WAIT:
--
2.26.3
- [PULL 00/36] MIPS patches for 2021-05-02, Philippe Mathieu-Daudé, 2021/05/02
- [PULL 01/36] hw/isa/piix4: Use qdev_get_gpio_in_named() to get ISA IRQ, Philippe Mathieu-Daudé, 2021/05/02
- [PULL 02/36] target/mips: Fix CACHEE opcode (CACHE using EVA addressing), Philippe Mathieu-Daudé, 2021/05/02
- [PULL 03/36] target/mips: Add missing CP0 check to nanoMIPS RDPGPR / WRPGPR opcodes,
Philippe Mathieu-Daudé <=
- [PULL 04/36] target/mips: Remove spurious LOG_UNIMP of MTHC0 opcode, Philippe Mathieu-Daudé, 2021/05/02
- [PULL 05/36] target/mips: Migrate missing CPU fields, Philippe Mathieu-Daudé, 2021/05/02
- [PULL 06/36] target/mips: Make check_cp0_enabled() return a boolean, Philippe Mathieu-Daudé, 2021/05/02
- [PULL 07/36] target/mips: Simplify meson TCG rules, Philippe Mathieu-Daudé, 2021/05/02
- [PULL 08/36] target/mips: Move IEEE rounding mode array to new source file, Philippe Mathieu-Daudé, 2021/05/02
- [PULL 09/36] target/mips: Move msa_reset() to new source file, Philippe Mathieu-Daudé, 2021/05/02
- [PULL 10/36] target/mips: Make CPU/FPU regnames[] arrays global, Philippe Mathieu-Daudé, 2021/05/02
- [PULL 11/36] target/mips: Optimize CPU/FPU regnames[] arrays, Philippe Mathieu-Daudé, 2021/05/02
- [PULL 12/36] target/mips: Restrict mips_cpu_dump_state() to cpu.c, Philippe Mathieu-Daudé, 2021/05/02
- [PULL 13/36] target/mips: Turn printfpr() macro into a proper function, Philippe Mathieu-Daudé, 2021/05/02