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[PULL v2 19/31] Hexagon (target/hexagon) cleanup reg_field_info definiti
From: |
Richard Henderson |
Subject: |
[PULL v2 19/31] Hexagon (target/hexagon) cleanup reg_field_info definition |
Date: |
Sun, 2 May 2021 07:44:07 -0700 |
From: Taylor Simpson <tsimpson@quicinc.com>
Include size in declaration
Remove {0, 0} entry
Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <1617930474-31979-15-git-send-email-tsimpson@quicinc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/hexagon/reg_fields.h | 4 ++--
target/hexagon/reg_fields.c | 3 +--
2 files changed, 3 insertions(+), 4 deletions(-)
diff --git a/target/hexagon/reg_fields.h b/target/hexagon/reg_fields.h
index d3c86c942f..9e2ad5d997 100644
--- a/target/hexagon/reg_fields.h
+++ b/target/hexagon/reg_fields.h
@@ -23,8 +23,6 @@ typedef struct {
int width;
} RegField;
-extern const RegField reg_field_info[];
-
enum {
#define DEF_REG_FIELD(TAG, START, WIDTH) \
TAG,
@@ -33,4 +31,6 @@ enum {
#undef DEF_REG_FIELD
};
+extern const RegField reg_field_info[NUM_REG_FIELDS];
+
#endif
diff --git a/target/hexagon/reg_fields.c b/target/hexagon/reg_fields.c
index bdcab79428..6713203725 100644
--- a/target/hexagon/reg_fields.c
+++ b/target/hexagon/reg_fields.c
@@ -18,10 +18,9 @@
#include "qemu/osdep.h"
#include "reg_fields.h"
-const RegField reg_field_info[] = {
+const RegField reg_field_info[NUM_REG_FIELDS] = {
#define DEF_REG_FIELD(TAG, START, WIDTH) \
{ START, WIDTH },
#include "reg_fields_def.h.inc"
- { 0, 0 }
#undef DEF_REG_FIELD
};
--
2.25.1
- [PULL v2 08/31] Hexagon (target/hexagon) remove unnecessary inline directives, (continued)
- [PULL v2 08/31] Hexagon (target/hexagon) remove unnecessary inline directives, Richard Henderson, 2021/05/02
- [PULL v2 07/31] Hexagon (target/hexagon) cleanup gen_log_predicated_reg_write_pair, Richard Henderson, 2021/05/02
- [PULL v2 03/31] target/hexagon: Change DECODE_MAPPED_REG operand name to OPNUM, Richard Henderson, 2021/05/02
- [PULL v2 09/31] Hexagon (target/hexagon) use env_archcpu and env_cpu, Richard Henderson, 2021/05/02
- [PULL v2 05/31] target/hexagon: remove unnecessary semicolons, Richard Henderson, 2021/05/02
- [PULL v2 11/31] Hexagon (target/hexagon) decide if pred has been written at TCG gen time, Richard Henderson, 2021/05/02
- [PULL v2 10/31] Hexagon (target/hexagon) properly generate TB end for DISAS_NORETURN, Richard Henderson, 2021/05/02
- [PULL v2 13/31] Hexagon (target/hexagon) remove unused carry_from_add64 function, Richard Henderson, 2021/05/02
- [PULL v2 14/31] Hexagon (target/hexagon) change type of softfloat_roundingmodes, Richard Henderson, 2021/05/02
- [PULL v2 15/31] Hexagon (target/hexagon) use softfloat default NaN and tininess, Richard Henderson, 2021/05/02
- [PULL v2 19/31] Hexagon (target/hexagon) cleanup reg_field_info definition,
Richard Henderson <=
- [PULL v2 06/31] Hexagon (target/hexagon) TCG generation cleanup, Richard Henderson, 2021/05/02
- [PULL v2 16/31] Hexagon (target/hexagon) replace float32_mul_pow2 with float32_scalbn, Richard Henderson, 2021/05/02
- [PULL v2 24/31] Hexagon (target/hexagon) add A5_ACS (vacsh), Richard Henderson, 2021/05/02
- [PULL v2 20/31] Hexagon (target/hexagon) move QEMU_GENERATE to only be on during macros.h, Richard Henderson, 2021/05/02
- [PULL v2 12/31] Hexagon (target/hexagon) change variables from int to bool when appropriate, Richard Henderson, 2021/05/02
- [PULL v2 21/31] Hexagon (target/hexagon) compile all debug code, Richard Henderson, 2021/05/02
- [PULL v2 22/31] Hexagon (target/hexagon) add F2_sfrecipa instruction, Richard Henderson, 2021/05/02
- [PULL v2 26/31] Hexagon (target/hexagon) add A4_addp_c/A4_subp_c, Richard Henderson, 2021/05/02
- [PULL v2 28/31] Hexagon (target/hexagon) bit reverse (brev) addressing, Richard Henderson, 2021/05/02
- [PULL v2 18/31] Hexagon (target/hexagon) cleanup ternary operators in semantics, Richard Henderson, 2021/05/02