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[Bug 1923861] [NEW] Hardfault when accessing FPSCR register
From: |
ml-0 |
Subject: |
[Bug 1923861] [NEW] Hardfault when accessing FPSCR register |
Date: |
Wed, 14 Apr 2021 15:43:51 -0000 |
Public bug reported:
QEMU release version: v6.0.0-rc2
command line:
qemu-system-arm -machine mps3-an547 -nographic -kernel <my_project>.elf
-semihosting -semihosting-config enable=on,target=native
host operating system: Linux ISCNR90TMR1S 5.4.72-microsoft-standard-WSL2
#1 SMP Wed Oct 28 23:40:43 UTC 2020 x86_64 x86_64 x86_64 GNU/Linux
guest operating system: none (bare metal)
Observation:
I am simulating embedded firmware for a Cortex-M55 device, using MPS3-AN547
machine. In the startup code I am accessing the FPSCR core register:
unsigned int fpscr =__get_FPSCR();
fpscr = fpscr & (~FPU_FPDSCR_AHP_Msk);
__set_FPSCR(fpscr);
where the register access functions __get_FPSCR() and __set_FPSCR(fpscr)
are taken from CMSIS_5 at ./CMSIS/Core/include/cmsis_gcc.h
I observe hardfaults upon __get_FPSCR() and __set_FPSCR(fpscr). The same
startup code works fine on the Arm Corstone-300 FVP.
** Affects: qemu
Importance: Undecided
Status: New
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https://bugs.launchpad.net/bugs/1923861
Title:
Hardfault when accessing FPSCR register
Status in QEMU:
New
Bug description:
QEMU release version: v6.0.0-rc2
command line:
qemu-system-arm -machine mps3-an547 -nographic -kernel <my_project>.elf
-semihosting -semihosting-config enable=on,target=native
host operating system: Linux ISCNR90TMR1S 5.4.72-microsoft-standard-
WSL2 #1 SMP Wed Oct 28 23:40:43 UTC 2020 x86_64 x86_64 x86_64
GNU/Linux
guest operating system: none (bare metal)
Observation:
I am simulating embedded firmware for a Cortex-M55 device, using MPS3-AN547
machine. In the startup code I am accessing the FPSCR core register:
unsigned int fpscr =__get_FPSCR();
fpscr = fpscr & (~FPU_FPDSCR_AHP_Msk);
__set_FPSCR(fpscr);
where the register access functions __get_FPSCR() and
__set_FPSCR(fpscr) are taken from CMSIS_5 at
./CMSIS/Core/include/cmsis_gcc.h
I observe hardfaults upon __get_FPSCR() and __set_FPSCR(fpscr). The
same startup code works fine on the Arm Corstone-300 FVP.
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- [Bug 1923861] [NEW] Hardfault when accessing FPSCR register,
ml-0 <=
- [Bug 1923861] Re: Hardfault when accessing FPSCR register, ml-0, 2021/04/15
- [Bug 1923861] Re: Hardfault when accessing FPSCR register, Peter Maydell, 2021/04/15
- [Bug 1923861] Re: Hardfault when accessing FPSCR register, ml-0, 2021/04/15
- [Bug 1923861] Re: Hardfault when accessing FPSCR register, Peter Maydell, 2021/04/15
- [Bug 1923861] Re: Hardfault when accessing FPSCR register, ml-0, 2021/04/15
- [Bug 1923861] Re: Hardfault when accessing FPSCR register, Peter Maydell, 2021/04/15
- [Bug 1923861] Re: Hardfault when accessing FPSCR register, Peter Maydell, 2021/04/15
- [Bug 1923861] Re: Hardfault when accessing FPSCR register, ml-0, 2021/04/16
- [Bug 1923861] Re: Hardfault when accessing FPSCR register, Peter Maydell, 2021/04/16
- [Bug 1923861] Re: Hardfault when accessing FPSCR register, Peter Maydell, 2021/04/16