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[RFC v12 54/65] target/arm: arch_dump: restrict ELFCLASS64 to AArch64
From: |
Claudio Fontana |
Subject: |
[RFC v12 54/65] target/arm: arch_dump: restrict ELFCLASS64 to AArch64 |
Date: |
Fri, 26 Mar 2021 20:36:50 +0100 |
this will allow us to restrict more code to TARGET_AARCH64
Signed-off-by: Claudio Fontana <cfontana@suse.de>
---
target/arm/arch_dump.c | 12 +++++++-----
target/arm/cpu.c | 1 -
target/arm/cpu64.c | 4 ++++
3 files changed, 11 insertions(+), 6 deletions(-)
diff --git a/target/arm/arch_dump.c b/target/arm/arch_dump.c
index 0184845310..9cc75a6fda 100644
--- a/target/arm/arch_dump.c
+++ b/target/arm/arch_dump.c
@@ -23,6 +23,8 @@
#include "elf.h"
#include "sysemu/dump.h"
+#ifdef TARGET_AARCH64
+
/* struct user_pt_regs from arch/arm64/include/uapi/asm/ptrace.h */
struct aarch64_user_regs {
uint64_t regs[31];
@@ -141,7 +143,6 @@ static int
aarch64_write_elf64_prfpreg(WriteCoreDumpFunction f,
return 0;
}
-#ifdef TARGET_AARCH64
static off_t sve_zreg_offset(uint32_t vq, int n)
{
off_t off = sizeof(struct aarch64_user_sve_header);
@@ -229,7 +230,6 @@ static int aarch64_write_elf64_sve(WriteCoreDumpFunction f,
return 0;
}
-#endif
int arm_cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cs,
int cpuid, void *opaque)
@@ -272,15 +272,15 @@ int arm_cpu_write_elf64_note(WriteCoreDumpFunction f,
CPUState *cs,
return ret;
}
-#ifdef TARGET_AARCH64
if (cpu_isar_feature(aa64_sve, cpu)) {
ret = aarch64_write_elf64_sve(f, env, cpuid, s);
}
-#endif
return ret;
}
+#endif /* TARGET_AARCH64 */
+
/* struct pt_regs from arch/arm/include/asm/ptrace.h */
struct arm_user_regs {
uint32_t regs[17];
@@ -449,12 +449,14 @@ ssize_t cpu_get_note_size(int class, int machine, int
nr_cpus)
size_t note_size;
if (class == ELFCLASS64) {
+#ifdef TARGET_AARCH64
note_size = AARCH64_PRSTATUS_NOTE_SIZE;
note_size += AARCH64_PRFPREG_NOTE_SIZE;
-#ifdef TARGET_AARCH64
if (cpu_isar_feature(aa64_sve, cpu)) {
note_size += AARCH64_SVE_NOTE_SIZE(&cpu->env);
}
+#else
+ return -1; /* unsupported */
#endif
} else {
note_size = ARM_PRSTATUS_NOTE_SIZE;
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 78ffd72f6a..195fe49fbf 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -1391,7 +1391,6 @@ static void arm_cpu_class_init(ObjectClass *oc, void
*data)
cc->asidx_from_attrs = arm_asidx_from_attrs;
cc->vmsd = &vmstate_arm_cpu;
cc->virtio_is_big_endian = arm_cpu_virtio_is_big_endian;
- cc->write_elf64_note = arm_cpu_write_elf64_note;
cc->write_elf32_note = arm_cpu_write_elf32_note;
#endif
diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c
index 4c758ab5a4..52d8bff267 100644
--- a/target/arm/cpu64.c
+++ b/target/arm/cpu64.c
@@ -636,6 +636,10 @@ static void aarch64_cpu_class_init(ObjectClass *oc, void
*data)
cc->gdb_arch_name = aarch64_gdb_arch_name;
cc->dump_state = arm_cpu_dump_state;
+#ifndef CONFIG_USER_ONLY
+ cc->write_elf64_note = arm_cpu_write_elf64_note;
+#endif /* !CONFIG_USER_ONLY */
+
object_class_property_add_bool(oc, "aarch64", aarch64_cpu_get_aarch64,
aarch64_cpu_set_aarch64);
object_class_property_set_description(oc, "aarch64",
--
2.26.2
- Re: [RFC v12 46/65] target/arm: create kvm cpu accel class, (continued)
- [RFC v12 52/65] target/arm: make is_aa64 and arm_el_is_aa64 a macro for !TARGET_AARCH64, Claudio Fontana, 2021/03/26
- [RFC v12 51/65] target/arm: cpu-sve: split TCG and KVM functionality, Claudio Fontana, 2021/03/26
- [RFC v12 53/65] target/arm: restrict rebuild_hflags_a64 to TARGET_AARCH64, Claudio Fontana, 2021/03/26
- [RFC v12 56/65] target/arm: tcg: restrict ZCR cpregs to TARGET_AARCH64, Claudio Fontana, 2021/03/26
- [RFC v12 54/65] target/arm: arch_dump: restrict ELFCLASS64 to AArch64,
Claudio Fontana <=
- [RFC v12 55/65] target/arm: cpu-exceptions: new module, Claudio Fontana, 2021/03/26
- [RFC v12 57/65] target/arm: tcg-sve: import narrow_vq and change_el functions, Claudio Fontana, 2021/03/26
- [RFC v12 58/65] target/arm: tcg-sve: rename the narrow_vq and change_el functions, Claudio Fontana, 2021/03/26
- [RFC v12 60/65] target/arm: cpu-pauth: new module for ARMv8.3 Pointer Authentication, Claudio Fontana, 2021/03/26
- [RFC v12 62/65] target/arm: refactor arm_cpu_finalize_features into cpu64, Claudio Fontana, 2021/03/26