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Re: [RFC v11 30/55] target/arm: wrap call to aarch64_sve_change_el in tc


From: Claudio Fontana
Subject: Re: [RFC v11 30/55] target/arm: wrap call to aarch64_sve_change_el in tcg_enabled()
Date: Wed, 24 Mar 2021 09:29:08 +0100
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.12.0

On 3/23/21 11:50 PM, Alex Bennée wrote:
> 
> Claudio Fontana <cfontana@suse.de> writes:
> 
>> After this patch it is possible to build only kvm:
>>
>> ./configure --disable-tcg --enable-kvm


It's possible to build, but tests will fail until all the test-related patches 
are applied.


> 
> FWIW at this point we get a different failure than later on:
> 
>   21:10:25 [alex@aarch64-new:~/l/q/b/disable.tcg] (94e2abe0…)|… + make 
> check-qtest
>     GIT     ui/keycodemapdb tests/fp/berkeley-testfloat-3 
> tests/fp/berkeley-softfloat-3 meson dtc capstone slirp
>   [1/19] Generating qemu-version.h with a meson_exe.py custom command
>   Running test qtest-aarch64/qom-test
>   qemu-system-aarch64: missing interface 'idau-interface' for object 'machine'

This one is broken by a recent commit in QEMU mainline, by removing the idau 
interface from KVM cpus.

This is fixed by: Revert "target/arm: Restrict v8M IDAU to TCG" in the series.

>   socket_accept failed: Resource temporarily unavailable
>   **
>   ERROR:../../tests/qtest/libqtest.c:319:qtest_init_without_qmp_handshake: 
> assertion failed: (s->fd >= 0 && s->qmp_fd >= 0)
>   ERROR qtest-aarch64/qom-test - Bail out! 
> ERROR:../../tests/qtest/libqtest.c:319:qtest_init_without_qmp_handshake: 
> assertion failed: (s->fd >= 0 && s->qmp_fd >= 0)
>   make: *** [Makefile.mtest:24: run-test-1] Error 1
> 
> 
>>
>> Signed-off-by: Claudio Fontana <cfontana@suse.de>
>> ---
>>  target/arm/cpu-sysemu.c | 12 +++++++-----
>>  1 file changed, 7 insertions(+), 5 deletions(-)
>>
>> diff --git a/target/arm/cpu-sysemu.c b/target/arm/cpu-sysemu.c
>> index eb928832a9..05d6e79ad9 100644
>> --- a/target/arm/cpu-sysemu.c
>> +++ b/target/arm/cpu-sysemu.c
>> @@ -820,11 +820,13 @@ static void arm_cpu_do_interrupt_aarch64(CPUState *cs)
>>      unsigned int cur_el = arm_current_el(env);
>>      int rt;
>>  
>> -    /*
>> -     * Note that new_el can never be 0.  If cur_el is 0, then
>> -     * el0_a64 is is_a64(), else el0_a64 is ignored.
>> -     */
>> -    aarch64_sve_change_el(env, cur_el, new_el, is_a64(env));
>> +    if (tcg_enabled()) {
>> +        /*
>> +         * Note that new_el can never be 0.  If cur_el is 0, then
>> +         * el0_a64 is is_a64(), else el0_a64 is ignored.
>> +         */
>> +        aarch64_sve_change_el(env, cur_el, new_el, is_a64(env));
>> +    }
>>  
>>      if (cur_el < new_el) {
>>          /* Entry vector offset depends on whether the implemented EL
> 
> 




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