[Bug 1915027] Re: RISC-V 64, CPUs do ilegal 0x00 write with SMP

[Alistair Francis]

Even with -smp 1 you will see the same errors. The problem is because
there is nothing to run after OpenSBI jumps to the next stage.

If you load a kernel you will not see the error messages.

** Changed in: qemu
       Status: New => Invalid

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https://bugs.launchpad.net/bugs/1915027

Title:
  RISC-V 64, CPUs do ilegal 0x00 write with SMP

Status in QEMU:
  Invalid

Bug description:
  When QEMU is runt like this:

  qemu-system-riscv64 -d unimp,guest_errors -smp 8

  Other harts will do a illegal write on address 0x00.

  This could be mostly (i think) because the initial assembly code is
  only loaded on the first hart and the others do a mess because there
  is no code to execute.

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