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[PATCH 0/5] tcg: Issue memory barriers for guest memory model


From: Richard Henderson
Subject: [PATCH 0/5] tcg: Issue memory barriers for guest memory model
Date: Tue, 16 Mar 2021 16:07:30 -0600

This is intending to fix the current aarch64 host failure
for s390x guest cdrom-test.  This is caused by the io thread
issuing memory barriers that are supposed to be matched by
the vcpu, but are elided by tcg in rr mode as "unnecessary".

I know Peter would like a smaller patch to sync the io thread
with the vcpu thread.  I've made a couple of attempts at this,
but havn't managed to get something reliable (although now
irritatingly infrequent -- about 1 in 500).

I have further patches to further optimize barriers, and to
generate load-acquire/store-release instructions in tcg.
But it's late in the release cycle, etc etc.

I've done nothing to measure the performance impact of this.
I quit the cdtom-test cycle after 4000 passes.


r~


Richard Henderson (5):
  tcg: Decode the operand to INDEX_op_mb in dumps
  tcg: Do not elide memory barriers for CF_PARALLEL
  tcg: Elide memory barriers implied by the host memory model
  tcg: Create tcg_req_mo
  tcg: Add host memory barriers to cpu_ldst.h interfaces

 include/exec/cpu_ldst.h |  7 ++++
 include/tcg/tcg.h       | 20 +++++++++++
 accel/tcg/cputlb.c      |  2 ++
 accel/tcg/tcg-all.c     |  6 +---
 accel/tcg/user-exec.c   | 17 +++++++++
 tcg/tcg-op.c            | 19 +++++-----
 tcg/tcg.c               | 79 +++++++++++++++++++++++++++++++++++++++++
 7 files changed, 137 insertions(+), 13 deletions(-)

-- 
2.25.1




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