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[PATCH v3 0/5] target/mips: Reintroduce the R5900 CPU


From: Philippe Mathieu-Daudé
Subject: [PATCH v3 0/5] target/mips: Reintroduce the R5900 CPU
Date: Fri, 12 Mar 2021 17:24:29 +0100

I'm running out of time to address Richard's comments on the new
opcodes, so let's KISS and only fix RDHWR (after adding LQ/SQ).

Missing review: 3 & 5
- target/mips/tx79: Move RDHWR usermode kludge to trans_SQ()
- tests/tcg/mips: Test user mode DMULT for the R5900

Based-on: mips-next
Supersedes: <20210309145653.743937-1-f4bug@amsat.org>

Fredrik Noring (1):
  tests/tcg/mips: Test user mode DMULT for the R5900

Philippe Mathieu-Daudé (4):
  target/mips/tx79: Introduce LQ opcode (Load Quadword)
  target/mips/tx79: Introduce SQ opcode (Store Quadword)
  target/mips/tx79: Move RDHWR usermode kludge to trans_SQ()
  target/mips: Reintroduce the R5900 CPU

 target/mips/tx79.decode           | 12 ++++
 target/mips/translate.c           | 72 +-----------------------
 target/mips/tx79_translate.c      | 93 +++++++++++++++++++++++++++++++
 tests/tcg/mips/test-r5900-dmult.c | 40 +++++++++++++
 target/mips/cpu-defs.c.inc        | 59 ++++++++++++++++++++
 tests/tcg/mips/Makefile.target    | 11 +++-
 6 files changed, 214 insertions(+), 73 deletions(-)
 create mode 100644 tests/tcg/mips/test-r5900-dmult.c

-- 
2.26.2




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