Re: [PATCH 16/26] tcg: Move MAX_CODE_GEN_BUFFER

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Re: [PATCH 16/26] tcg: Move MAX_CODE_GEN_BUFFER_SIZE to tcg-target.h

From:	BALATON Zoltan
Subject:	Re: [PATCH 16/26] tcg: Move MAX_CODE_GEN_BUFFER_SIZE to tcg-target.h
Date:	Thu, 11 Mar 2021 01:42:43 +0100 (CET)

On Wed, 10 Mar 2021, Richard Henderson wrote:

Remove the ifdef ladder and move each define into the
appropriate header file.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/aarch64/tcg-target.h |  1 +
tcg/arm/tcg-target.h     |  1 +
tcg/i386/tcg-target.h    |  2 ++
tcg/mips/tcg-target.h    |  6 ++++++
tcg/ppc/tcg-target.h     |  2 ++
tcg/riscv/tcg-target.h   |  1 +
tcg/s390/tcg-target.h    |  3 +++
tcg/sparc/tcg-target.h   |  1 +
tcg/tci/tcg-target.h     |  1 +
tcg/region.c             | 32 ++++++--------------------------
10 files changed, 24 insertions(+), 26 deletions(-)

diff --git a/tcg/aarch64/tcg-target.h b/tcg/aarch64/tcg-target.h
index 5ec30dba25..ef55f7c185 100644
--- a/tcg/aarch64/tcg-target.h
+++ b/tcg/aarch64/tcg-target.h
@@ -15,6 +15,7 @@

#define TCG_TARGET_INSN_UNIT_SIZE  4
#define TCG_TARGET_TLB_DISPLACEMENT_BITS 24
+#define MAX_CODE_GEN_BUFFER_SIZE  (2 * GiB)
#undef TCG_TARGET_STACK_GROWSUP

typedef enum {
diff --git a/tcg/arm/tcg-target.h b/tcg/arm/tcg-target.h
index 8d1fee6327..b9a85d0f83 100644
--- a/tcg/arm/tcg-target.h
+++ b/tcg/arm/tcg-target.h
@@ -60,6 +60,7 @@ extern int arm_arch;
#undef TCG_TARGET_STACK_GROWSUP
#define TCG_TARGET_INSN_UNIT_SIZE 4
#define TCG_TARGET_TLB_DISPLACEMENT_BITS 16
+#define MAX_CODE_GEN_BUFFER_SIZE  UINT32_MAX

typedef enum {
    TCG_REG_R0 = 0,
diff --git a/tcg/i386/tcg-target.h b/tcg/i386/tcg-target.h
index b693d3692d..ac10066c3e 100644
--- a/tcg/i386/tcg-target.h
+++ b/tcg/i386/tcg-target.h
@@ -31,9 +31,11 @@
#ifdef __x86_64__
# define TCG_TARGET_REG_BITS  64
# define TCG_TARGET_NB_REGS   32
+# define MAX_CODE_GEN_BUFFER_SIZE  (2 * GiB)
#else
# define TCG_TARGET_REG_BITS  32
# define TCG_TARGET_NB_REGS   24
+# define MAX_CODE_GEN_BUFFER_SIZE  UINT32_MAX
#endif

typedef enum {
diff --git a/tcg/mips/tcg-target.h b/tcg/mips/tcg-target.h
index c2c32fb38f..e81e824cab 100644
--- a/tcg/mips/tcg-target.h
+++ b/tcg/mips/tcg-target.h
@@ -39,6 +39,12 @@
#define TCG_TARGET_TLB_DISPLACEMENT_BITS 16
#define TCG_TARGET_NB_REGS 32

+/*
+ * We have a 256MB branch region, but leave room to make sure the
+ * main executable is also within that region.
+ */
+#define MAX_CODE_GEN_BUFFER_SIZE  (128 * MiB)
+
typedef enum {
    TCG_REG_ZERO = 0,
    TCG_REG_AT,
diff --git a/tcg/ppc/tcg-target.h b/tcg/ppc/tcg-target.h
index d1339afc66..c13ed5640a 100644
--- a/tcg/ppc/tcg-target.h
+++ b/tcg/ppc/tcg-target.h
@@ -27,8 +27,10 @@

#ifdef _ARCH_PPC64
# define TCG_TARGET_REG_BITS  64
+# define MAX_CODE_GEN_BUFFER_SIZE  (2 * GiB)
#else
# define TCG_TARGET_REG_BITS  32
+# define MAX_CODE_GEN_BUFFER_SIZE  (32 * MiB)
#endif

#define TCG_TARGET_NB_REGS 64
diff --git a/tcg/riscv/tcg-target.h b/tcg/riscv/tcg-target.h
index 727c8df418..87ea94666b 100644
--- a/tcg/riscv/tcg-target.h
+++ b/tcg/riscv/tcg-target.h
@@ -34,6 +34,7 @@
#define TCG_TARGET_INSN_UNIT_SIZE 4
#define TCG_TARGET_TLB_DISPLACEMENT_BITS 20
#define TCG_TARGET_NB_REGS 32
+#define MAX_CODE_GEN_BUFFER_SIZE  ((size_t)-1)

typedef enum {
    TCG_REG_ZERO,
diff --git a/tcg/s390/tcg-target.h b/tcg/s390/tcg-target.h
index 641464eea4..b04b72b7eb 100644
--- a/tcg/s390/tcg-target.h
+++ b/tcg/s390/tcg-target.h
@@ -28,6 +28,9 @@
#define TCG_TARGET_INSN_UNIT_SIZE 2
#define TCG_TARGET_TLB_DISPLACEMENT_BITS 19

+/* We have a +- 4GB range on the branches; leave some slop.  */
+#define MAX_CODE_GEN_BUFFER_SIZE  (3 * GiB)
+
typedef enum TCGReg {
    TCG_REG_R0 = 0,
    TCG_REG_R1,
diff --git a/tcg/sparc/tcg-target.h b/tcg/sparc/tcg-target.h
index f66f5d07dc..86bb9a2d39 100644
--- a/tcg/sparc/tcg-target.h
+++ b/tcg/sparc/tcg-target.h
@@ -30,6 +30,7 @@
#define TCG_TARGET_INSN_UNIT_SIZE 4
#define TCG_TARGET_TLB_DISPLACEMENT_BITS 32
#define TCG_TARGET_NB_REGS 32
+#define MAX_CODE_GEN_BUFFER_SIZE  (2 * GiB)

typedef enum {
    TCG_REG_G0 = 0,
diff --git a/tcg/tci/tcg-target.h b/tcg/tci/tcg-target.h
index 9c0021a26f..03cf527cb4 100644
--- a/tcg/tci/tcg-target.h
+++ b/tcg/tci/tcg-target.h
@@ -43,6 +43,7 @@
#define TCG_TARGET_INTERPRETER 1
#define TCG_TARGET_INSN_UNIT_SIZE 1
#define TCG_TARGET_TLB_DISPLACEMENT_BITS 32
+#define MAX_CODE_GEN_BUFFER_SIZE  ((size_t)-1)

#if UINTPTR_MAX == UINT32_MAX
# define TCG_TARGET_REG_BITS 32
diff --git a/tcg/region.c b/tcg/region.c
index e3fbf6a7e7..8fba0724e5 100644
--- a/tcg/region.c
+++ b/tcg/region.c
@@ -398,34 +398,14 @@ static size_t tcg_n_regions(unsigned max_cpus)
#endif
}

-/* Minimum size of the code gen buffer.  This number is randomly chosen,
-   but not so small that we can't have a fair number of TB's live.  */
+/*
+ * Minimum size of the code gen buffer.  This number is randomly chosen,
+ * but not so small that we can't have a fair number of TB's live.
+ *
+ * Maximum size is defined in tcg-target.h.
+ */
#define MIN_CODE_GEN_BUFFER_SIZE     (1 * MiB)

-/* Maximum size of the code gen buffer we'd like to use.  Unless otherwise
-   indicated, this is constrained by the range of direct branches on the
-   host cpu, as used by the TCG implementation of goto_tb.  */

This comment about constraints seems to have been lost. Should it bepreserved above?


Regards,
BALATON Zoltan

-#if defined(__x86_64__)
-# define MAX_CODE_GEN_BUFFER_SIZE  (2 * GiB)
-#elif defined(__sparc__)
-# define MAX_CODE_GEN_BUFFER_SIZE  (2 * GiB)
-#elif defined(__powerpc64__)
-# define MAX_CODE_GEN_BUFFER_SIZE  (2 * GiB)
-#elif defined(__powerpc__)
-# define MAX_CODE_GEN_BUFFER_SIZE  (32 * MiB)
-#elif defined(__aarch64__)
-# define MAX_CODE_GEN_BUFFER_SIZE  (2 * GiB)
-#elif defined(__s390x__)
-  /* We have a +- 4GB range on the branches; leave some slop.  */
-# define MAX_CODE_GEN_BUFFER_SIZE  (3 * GiB)
-#elif defined(__mips__)
-  /* We have a 256MB branch region, but leave room to make sure the
-     main executable is also within that region.  */
-# define MAX_CODE_GEN_BUFFER_SIZE  (128 * MiB)
-#else
-# define MAX_CODE_GEN_BUFFER_SIZE  ((size_t)-1)
-#endif
-
#if TCG_TARGET_REG_BITS == 32
#define DEFAULT_CODE_GEN_BUFFER_SIZE_1 (32 * MiB)
#ifdef CONFIG_USER_ONLY

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[PATCH 11/26] accel/tcg: Rename tcg_init to tcg_init_machine, (continued)
- [PATCH 11/26] accel/tcg: Rename tcg_init to tcg_init_machine, Richard Henderson, 2021/03/10
  - Re: [PATCH 11/26] accel/tcg: Rename tcg_init to tcg_init_machine, Philippe Mathieu-Daudé, 2021/03/13
- [PATCH 12/26] tcg: Create tcg_init, Richard Henderson, 2021/03/10
- [PATCH 14/26] accel/tcg: Pass down max_cpus to tcg_init, Richard Henderson, 2021/03/10
  - Re: [PATCH 14/26] accel/tcg: Pass down max_cpus to tcg_init, Philippe Mathieu-Daudé, 2021/03/13
- [PATCH 10/26] accel/tcg: Move alloc_code_gen_buffer to tcg/region.c, Richard Henderson, 2021/03/10
- [PATCH 18/26] tcg: Tidy tcg_n_regions, Richard Henderson, 2021/03/10
- [PATCH 17/26] tcg: Replace region.end with region.total_size, Richard Henderson, 2021/03/10
- [PATCH 19/26] tcg: Tidy split_cross_256mb, Richard Henderson, 2021/03/10
- [PATCH 16/26] tcg: Move MAX_CODE_GEN_BUFFER_SIZE to tcg-target.h, Richard Henderson, 2021/03/10
  - Re: [PATCH 16/26] tcg: Move MAX_CODE_GEN_BUFFER_SIZE to tcg-target.h, BALATON Zoltan <=
    - Re: [PATCH 16/26] tcg: Move MAX_CODE_GEN_BUFFER_SIZE to tcg-target.h, Richard Henderson, 2021/03/13
- [PATCH 13/26] accel/tcg: Merge tcg_exec_init into tcg_init_machine, Richard Henderson, 2021/03/10
- [PATCH 23/26] tcg: Do not set guard pages in the rx buffer, Richard Henderson, 2021/03/10
- [PATCH 21/26] tcg: Return the map protection from alloc_code_gen_buffer, Richard Henderson, 2021/03/10
- [PATCH 20/26] tcg: Allocate code_gen_buffer into struct tcg_region_state, Richard Henderson, 2021/03/10
- [PATCH 22/26] tcg: Sink qemu_madvise call to common code, Richard Henderson, 2021/03/10
- [PATCH 15/26] tcg: Introduce tcg_max_ctxs, Richard Henderson, 2021/03/10
  - Re: [PATCH 15/26] tcg: Introduce tcg_max_ctxs, Philippe Mathieu-Daudé, 2021/03/13
- [PATCH 25/26] tcg: Merge buffer protection and guard page protection, Richard Henderson, 2021/03/10
- [PATCH 24/26] util/osdep: Add qemu_mprotect_rw, Richard Henderson, 2021/03/10

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