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[PULL 13/54] hw/misc/iotkit-sysctl: Add SSE-300 cases which match SSE-20
From: |
Peter Maydell |
Subject: |
[PULL 13/54] hw/misc/iotkit-sysctl: Add SSE-300 cases which match SSE-200 behaviour |
Date: |
Mon, 8 Mar 2021 17:32:03 +0000 |
The SSE-300's iokit-sysctl device is similar to the SSE-200, but
some registers have moved address or have different behaviours.
In this commit we add case statements for the registers where
the SSE-300 and SSE-200 have the same behaviour. Some registers
are the same on all SSE versions and so need no code change at all.
Putting both of these categories together covers:
0x0 SECDBGSTAT
0x4 SECDBGSET
0x8 SECDBGCLR
0xc SCSECCTRL
0x10 CLK_CFG0 -- this is like SSE-200 FCLK_DIV but with a
different set of clocks being controlled; our implementation
is a dummy reads-as-written anyway
0x14 CLK_CFG1 -- similar to SSE-200 SYSCLK_DIV; our implementation
is a dummy
0x18 CLK_FORCE -- similar to SSE-200 but different bit allocations;
we have a dummy implementation
0x100 RESET_SYNDROME -- bit allocation differs from SSE-200 but our
implementation is a dummy
0x104 RESET_MASK -- bit allocation differs from SSE-200 but our
implementation is a dummy
0x108 SWRESET
0x10c GRETREG
0x200 PDCM_PD_SYS_SENSE -- some bit allocations differ, but our
implementation is a dummy
We also need to migrate the state of these registers which are shared
between the SSE-200 and SSE-300, so update the vmstate 'needed'
function to do this.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210219144617.4782-14-peter.maydell@linaro.org
---
hw/misc/iotkit-sysctl.c | 12 +++++++++++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/hw/misc/iotkit-sysctl.c b/hw/misc/iotkit-sysctl.c
index c67f5b320ab..7f8608c814c 100644
--- a/hw/misc/iotkit-sysctl.c
+++ b/hw/misc/iotkit-sysctl.c
@@ -105,6 +105,7 @@ static uint64_t iotkit_sysctl_read(void *opaque, hwaddr
offset,
case ARMSSE_IOTKIT:
goto bad_offset;
case ARMSSE_SSE200:
+ case ARMSSE_SSE300:
r = s->scsecctrl;
break;
default:
@@ -116,6 +117,7 @@ static uint64_t iotkit_sysctl_read(void *opaque, hwaddr
offset,
case ARMSSE_IOTKIT:
goto bad_offset;
case ARMSSE_SSE200:
+ case ARMSSE_SSE300:
r = s->fclk_div;
break;
default:
@@ -127,6 +129,7 @@ static uint64_t iotkit_sysctl_read(void *opaque, hwaddr
offset,
case ARMSSE_IOTKIT:
goto bad_offset;
case ARMSSE_SSE200:
+ case ARMSSE_SSE300:
r = s->sysclk_div;
break;
default:
@@ -138,6 +141,7 @@ static uint64_t iotkit_sysctl_read(void *opaque, hwaddr
offset,
case ARMSSE_IOTKIT:
goto bad_offset;
case ARMSSE_SSE200:
+ case ARMSSE_SSE300:
r = s->clock_force;
break;
default:
@@ -202,6 +206,7 @@ static uint64_t iotkit_sysctl_read(void *opaque, hwaddr
offset,
case ARMSSE_IOTKIT:
goto bad_offset;
case ARMSSE_SSE200:
+ case ARMSSE_SSE300:
r = s->pdcm_pd_sys_sense;
break;
default:
@@ -348,6 +353,7 @@ static void iotkit_sysctl_write(void *opaque, hwaddr offset,
case ARMSSE_IOTKIT:
goto bad_offset;
case ARMSSE_SSE200:
+ case ARMSSE_SSE300:
qemu_log_mask(LOG_UNIMP, "IoTKit SysCtl SCSECCTRL
unimplemented\n");
s->scsecctrl = value;
break;
@@ -360,6 +366,7 @@ static void iotkit_sysctl_write(void *opaque, hwaddr offset,
case ARMSSE_IOTKIT:
goto bad_offset;
case ARMSSE_SSE200:
+ case ARMSSE_SSE300:
qemu_log_mask(LOG_UNIMP, "IoTKit SysCtl FCLK_DIV unimplemented\n");
s->fclk_div = value;
break;
@@ -372,6 +379,7 @@ static void iotkit_sysctl_write(void *opaque, hwaddr offset,
case ARMSSE_IOTKIT:
goto bad_offset;
case ARMSSE_SSE200:
+ case ARMSSE_SSE300:
qemu_log_mask(LOG_UNIMP, "IoTKit SysCtl SYSCLK_DIV
unimplemented\n");
s->sysclk_div = value;
break;
@@ -384,6 +392,7 @@ static void iotkit_sysctl_write(void *opaque, hwaddr offset,
case ARMSSE_IOTKIT:
goto bad_offset;
case ARMSSE_SSE200:
+ case ARMSSE_SSE300:
qemu_log_mask(LOG_UNIMP, "IoTKit SysCtl CLOCK_FORCE
unimplemented\n");
s->clock_force = value;
break;
@@ -420,6 +429,7 @@ static void iotkit_sysctl_write(void *opaque, hwaddr offset,
case ARMSSE_IOTKIT:
goto bad_offset;
case ARMSSE_SSE200:
+ case ARMSSE_SSE300:
qemu_log_mask(LOG_UNIMP,
"IoTKit SysCtl PDCM_PD_SYS_SENSE unimplemented\n");
s->pdcm_pd_sys_sense = value;
@@ -569,7 +579,7 @@ static bool sse200_needed(void *opaque)
{
IoTKitSysCtl *s = IOTKIT_SYSCTL(opaque);
- return s->sse_version == ARMSSE_SSE200;
+ return s->sse_version != ARMSSE_IOTKIT;
}
static const VMStateDescription iotkit_sysctl_sse200_vmstate = {
--
2.20.1
- [PULL 06/54] hw/misc/iotkit-sysctl: Remove is_sse200 flag, (continued)
- [PULL 06/54] hw/misc/iotkit-sysctl: Remove is_sse200 flag, Peter Maydell, 2021/03/08
- [PULL 10/54] hw/misc/iotkit-sysinfo.c: Implement SYS_CONFIG1 and IIDR, Peter Maydell, 2021/03/08
- [PULL 15/54] hw/misc/iotkit-sysctl: Handle INITSVTOR* for SSE-300, Peter Maydell, 2021/03/08
- [PULL 08/54] hw/misc/iotkit-sysinfo.c: Implement SSE-300 PID register values, Peter Maydell, 2021/03/08
- [PULL 11/54] hw/timer/sse-counter: Model the SSE Subsystem System Counter, Peter Maydell, 2021/03/08
- [PULL 07/54] hw/misc/iotkit-secctl.c: Implement SSE-300 PID register values, Peter Maydell, 2021/03/08
- [PULL 09/54] hw/arm/armsse.c: Use correct SYS_CONFIG0 register value for SSE-300, Peter Maydell, 2021/03/08
- [PULL 14/54] hw/misc/iotkit-sysctl: Handle CPU_WAIT, NMI_ENABLE for SSE-300, Peter Maydell, 2021/03/08
- [PULL 16/54] hw/misc/iotkit-sysctl: Implement dummy version of SSE-300 PWRCTRL register, Peter Maydell, 2021/03/08
- [PULL 12/54] hw/timer/sse-timer: Model the SSE Subsystem System Timer, Peter Maydell, 2021/03/08
- [PULL 13/54] hw/misc/iotkit-sysctl: Add SSE-300 cases which match SSE-200 behaviour,
Peter Maydell <=
- [PULL 17/54] hw/misc/iotkit-sysctl: Handle SSE-300 changes to PDCM_PD_*_SENSE registers, Peter Maydell, 2021/03/08
- [PULL 21/54] hw/arm/armsse: Use an array for apb_ppc fields in the state structure, Peter Maydell, 2021/03/08
- [PULL 20/54] hw/misc/sse-cpu-pwrctrl: Implement SSE-300 CPU<N>_PWRCTRL register block, Peter Maydell, 2021/03/08
- [PULL 23/54] hw/arm/armsse: Add framework for data-driven device placement, Peter Maydell, 2021/03/08
- [PULL 25/54] hw/arm/armsse: Move watchdogs into data-driven framework, Peter Maydell, 2021/03/08
- [PULL 26/54] hw/arm/armsse: Move s32ktimer into data-driven framework, Peter Maydell, 2021/03/08
- [PULL 30/54] hw/arm/armsse: Add missing SSE-200 SYS_PPU, Peter Maydell, 2021/03/08
- [PULL 22/54] hw/arm/armsse: Add a define for number of IRQs used by the SSE itself, Peter Maydell, 2021/03/08
- [PULL 32/54] hw/arm/armsse: Add support for SSE variants with a system counter, Peter Maydell, 2021/03/08
- [PULL 19/54] hw/arm/Kconfig: Move ARMSSE_CPUID and ARMSSE_MHU stanzas to hw/misc, Peter Maydell, 2021/03/08