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[PULL 26/27] include/exec: lightly re-arrange TranslationBlock
From: |
Richard Henderson |
Subject: |
[PULL 26/27] include/exec: lightly re-arrange TranslationBlock |
Date: |
Sat, 6 Mar 2021 13:36:12 -0800 |
From: Alex Bennée <alex.bennee@linaro.org>
Lets make sure all the flags we compare when looking up blocks are
together in the same place.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20210224165811.11567-5-alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/exec/exec-all.h | 11 ++++++++---
1 file changed, 8 insertions(+), 3 deletions(-)
diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
index acf66ab692..a262dd5804 100644
--- a/include/exec/exec-all.h
+++ b/include/exec/exec-all.h
@@ -448,9 +448,6 @@ struct TranslationBlock {
target_ulong pc; /* simulated PC corresponding to this block (EIP + CS
base) */
target_ulong cs_base; /* CS base for this block */
uint32_t flags; /* flags defining in which context the code was generated
*/
- uint16_t size; /* size of target code for this block (1 <=
- size <= TARGET_PAGE_SIZE) */
- uint16_t icount;
uint32_t cflags; /* compile flags */
#define CF_COUNT_MASK 0x00007fff
#define CF_LAST_IO 0x00008000 /* Last insn may be an IO access. */
@@ -464,6 +461,14 @@ struct TranslationBlock {
/* Per-vCPU dynamic tracing state used to generate this TB */
uint32_t trace_vcpu_dstate;
+ /*
+ * Above fields used for comparing
+ */
+
+ /* size of target code for this block (1 <= size <= TARGET_PAGE_SIZE) */
+ uint16_t size;
+ uint16_t icount;
+
struct tb_tc tc;
/* first and second physical page containing code. The lower bit
--
2.25.1
- [PULL 06/27] tcg: Manage splitwx in tc_ptr_to_region_tree by hand, (continued)
- [PULL 06/27] tcg: Manage splitwx in tc_ptr_to_region_tree by hand, Richard Henderson, 2021/03/06
- [PULL 17/27] tcg/tci: Remove tci_read_r32s, Richard Henderson, 2021/03/06
- [PULL 18/27] tcg/tci: Reduce use of tci_read_r64, Richard Henderson, 2021/03/06
- [PULL 10/27] tcg/tci: Merge identical cases in generation (conditional opcodes), Richard Henderson, 2021/03/06
- [PULL 16/27] tcg/tci: Remove tci_read_r32, Richard Henderson, 2021/03/06
- [PULL 21/27] tcg/tci: Merge bswap operations, Richard Henderson, 2021/03/06
- [PULL 20/27] tcg/tci: Merge extension operations, Richard Henderson, 2021/03/06
- [PULL 19/27] tcg/tci: Merge basic arithmetic operations, Richard Henderson, 2021/03/06
- [PULL 22/27] tcg/tci: Merge mov, not and neg operations, Richard Henderson, 2021/03/06
- [PULL 25/27] accel/tcg: drop the use of CF_HASH_MASK and rename params, Richard Henderson, 2021/03/06
- [PULL 26/27] include/exec: lightly re-arrange TranslationBlock,
Richard Henderson <=
- [PULL 23/27] accel/tcg: rename tb_lookup__cpu_state and hoist state extraction, Richard Henderson, 2021/03/06
- [PULL 24/27] accel/tcg: move CF_CLUSTER calculation to curr_cflags, Richard Henderson, 2021/03/06
- [PULL 27/27] accel/tcg: Precompute curr_cflags into cpu->tcg_cflags, Richard Henderson, 2021/03/06
- Re: [PULL 00/27] tcg patch queue, Peter Maydell, 2021/03/09