Re: [PATCH v2 40/42] esp: add trivial implementation of the ESP_RFLAGS register

[Laurent Vivier]

Le 09/02/2021 à 20:30, Mark Cave-Ayland a écrit :
> The bottom 5 bits contain the number of bytes remaining in the FIFO which is
> trivial to implement with Fifo8 (the remaining bits are unimplemented and left
> as 0 for now).
> 
> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
> ---
>  hw/scsi/esp.c | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/hw/scsi/esp.c b/hw/scsi/esp.c
> index 9dd9947307..1f01f2314b 100644
> --- a/hw/scsi/esp.c
> +++ b/hw/scsi/esp.c
> @@ -825,6 +825,10 @@ uint64_t esp_reg_read(ESPState *s, uint32_t saddr)
>              val = s->rregs[saddr];
>          }
>          break;
> +     case ESP_RFLAGS:
> +        /* Bottom 5 bits indicate number of bytes in FIFO */
> +        val = fifo8_num_used(&s->fifo);
> +        break;
>      default:
>          val = s->rregs[saddr];
>          break;
> 

Reviewed-by: Laurent Vivier <laurent@vivier.eu>