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[PATCH v2] i386: Add missing cpu feature bits in EPYC-Rome model
From: |
Babu Moger |
Subject: |
[PATCH v2] i386: Add missing cpu feature bits in EPYC-Rome model |
Date: |
Wed, 03 Mar 2021 09:45:30 -0600 |
User-agent: |
StGit/0.17.1-dirty |
Found the following cpu feature bits missing from EPYC-Rome model.
ibrs : Indirect Branch Restricted Speculation
ssbd : Speculative Store Bypass Disable
These new features will be added in EPYC-Rome-v2. The -cpu help output
after the change.
x86 EPYC-Rome (alias configured by machine type)
x86 EPYC-Rome-v1 AMD EPYC-Rome Processor
x86 EPYC-Rome-v2 AMD EPYC-Rome Processor
Reported-by: Pankaj Gupta <pankaj.gupta@cloud.ionos.com>
Signed-off-by: Babu Moger <babu.moger@amd.com>
Signed-off-by: Pankaj Gupta <pankaj.gupta@cloud.ionos.com>
---
v2: Model-id remains same between EPYC-Rome-v1 and EPYC-Rome-v2.
Removed model-id in the patch.
target/i386/cpu.c | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 6a53446e6a..30e7188b0e 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -4179,6 +4179,18 @@ static X86CPUDefinition builtin_x86_defs[] = {
.xlevel = 0x8000001E,
.model_id = "AMD EPYC-Rome Processor",
.cache_info = &epyc_rome_cache_info,
+ .versions = (X86CPUVersionDefinition[]) {
+ { .version = 1 },
+ {
+ .version = 2,
+ .props = (PropValue[]) {
+ { "ibrs", "on" },
+ { "amd-ssbd", "on" },
+ { /* end of list */ }
+ }
+ },
+ { /* end of list */ }
+ }
},
{
.name = "EPYC-Milan",
- [PATCH v2] i386: Add missing cpu feature bits in EPYC-Rome model,
Babu Moger <=