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[PATCH V16 2/6] target/mips: Add unaligned access support for MIPS64R6 a
From: |
Huacai Chen |
Subject: |
[PATCH V16 2/6] target/mips: Add unaligned access support for MIPS64R6 and Loongson-3 |
Date: |
Fri, 30 Oct 2020 18:25:37 +0800 |
MIPSR6 (not only MIPS32R6) processors support unaligned access in
hardware, so set MO_UNALN in their default_tcg_memop_mask. Btw, new
Loongson-3 (such as Loongson-3A4000) also support unaligned access,
since both old and new Loongson-3 use the same binaries, we can simply
set MO_UNALN for all Loongson-3 processors.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Huacai Chen <chenhc@lemote.com>
---
target/mips/translate.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/mips/translate.c b/target/mips/translate.c
index f449758..470f59c 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -31442,8 +31442,8 @@ static void mips_tr_init_disas_context(DisasContextBase
*dcbase, CPUState *cs)
#else
ctx->mem_idx = hflags_mmu_index(ctx->hflags);
#endif
- ctx->default_tcg_memop_mask = (ctx->insn_flags & ISA_MIPS32R6) ?
- MO_UNALN : MO_ALIGN;
+ ctx->default_tcg_memop_mask = (ctx->insn_flags & (ISA_MIPS32R6 |
ISA_MIPS64R6 |
+ INSN_LOONGSON3A)) ? MO_UNALN : MO_ALIGN;
LOG_DISAS("\ntb %p idx %d hflags %04x\n", ctx->base.tb, ctx->mem_idx,
ctx->hflags);
--
2.7.0
- [PATCH V16 0/6] mips: Add Loongson-3 machine support, Huacai Chen, 2020/10/30
- [PATCH V16 1/6] target/mips: Fix PageMask with variable page size, Huacai Chen, 2020/10/30
- [PATCH V16 2/6] target/mips: Add unaligned access support for MIPS64R6 and Loongson-3,
Huacai Chen <=
- [PATCH V16 3/6] hw/mips: Implement fw_cfg_arch_key_name(), Huacai Chen, 2020/10/30
- [PATCH V16 4/6] hw/mips: Add Loongson-3 boot parameter helpers, Huacai Chen, 2020/10/30
- [PATCH V16 5/6] hw/mips: Add Loongson-3 machine support, Huacai Chen, 2020/10/30
- [PATCH V16 6/6] docs/system: Update MIPS machine documentation, Huacai Chen, 2020/10/30