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Re: [PATCH 1/4] microvm: make number of virtio transports runtime config
From: |
Gerd Hoffmann |
Subject: |
Re: [PATCH 1/4] microvm: make number of virtio transports runtime configurable |
Date: |
Mon, 26 Oct 2020 08:04:30 +0100 |
Hi,
> > + mms->virtio_irq_base = 5;
> > + mms->virtio_num_transports = 8;
> > + if (x86_machine_is_acpi_enabled(x86ms)) {
> > + mms->virtio_irq_base = 16;
> > + }
>
> can we unify and use the same base in both cases?
Well, without ACPI the IO-APIC detection seems to not work reliable,
which in turn makes using IRQs 16+ problematic because the classic PIC
can't handle those ...
take care,
Gerd
- [PATCH 0/4] RfC: microvm: add second ioapic, Gerd Hoffmann, 2020/10/16
- [PATCH 1/4] microvm: make number of virtio transports runtime configurable, Gerd Hoffmann, 2020/10/16
- [PATCH 2/4] microvm: make pcie irq base runtime configurable, Gerd Hoffmann, 2020/10/16
- [PATCH 3/4] microvm: add second ioapic, Gerd Hoffmann, 2020/10/16
- [PATCH 4/4] microvm: reconfigure irqs if second ioapic is available, Gerd Hoffmann, 2020/10/16
- Re: [PATCH 0/4] RfC: microvm: add second ioapic, Philippe Mathieu-Daudé, 2020/10/16