All the MIPS cores emulated by QEMU provides the Coproc#0
'Count' register which can be used as a free running timer.
Since it's introduction in 2005 this timer uses a fixed
frequency of 100 MHz (for a CPU freq of 200 MHz).
While this is not an issue with Linux guests, it makes
some firmwares behave incorrectly.
The Clock API allow propagating clocks. It is particularly
useful when hardware dynamicly changes clock frequencies.
To be able to model such MIPS hardware, we need to refactor
the MIPS hardware code to handle clocks.
This series is organized as follow:
- let all CPU have an input clock,
- MIPS CPU get an input clock
- when the clock is changed, CP0 timer is updated
- set correct CPU frequencies to all boards
- do not allow MIPS CPU without input clock
I used a MIPSsim test suggested by Thomas. It is also included
as bonus at the end.
Possible follow up:
- QOM'ify the GIC
- let the GIC handle dynamic clock changes
Regards,
Phil.
Philippe Mathieu-Daudé (16):
hw/core/cpu: Let CPU object have a clock source
target/mips: Move cpu_mips_get_random() with CP0 helpers
target/mips/cp0_timer: Explicit unit in variable name
target/mips/cpu: Introduce mips_cpu_properties[]
target/mips/cpu: Set default CPU frequency to 200 MHz
target/mips: Keep CP0 counter in sync with the CPU frequency
hw/mips/r4k: Explicit CPU frequency is 200 MHz
hw/mips/fuloong2e: Set CPU frequency to 533 MHz
hw/mips/mipssim: Correct CPU frequency
hw/mips/jazz: Correct CPU frequencies
hw/mips/cps: Expose input clock and connect it to CPU cores
hw/mips/boston: Set CPU frequency to 1 GHz
hw/mips/malta: Set CPU frequency to 320 MHz
hw/mips/cps: Do not allow use without input clock
target/mips/cpu: Do not allow system-mode use without input clock
tests/acceptance: Test the MIPSsim machine