Re: [PATCH] target/i386: Support up to 32768 CPUs without IRQ remapping

[David Woodhouse]

On Mon, 2020-10-05 at 15:18 +0100, David Woodhouse wrote:
> The IOAPIC has an 'Extended Destination ID' field in its RTE, which maps
> to bits 11-4 of the MSI address. Since those address bits fall within a
> given 4KiB page they were historically non-trivial to use on real hardware.
> 
> The Intel IOMMU uses the lowest bit to indicate a remappable format MSI,
> and then the remaining 7 bits are part of the index.
> 
> Where the remappable format bit isn't set, we can actually use the other
> seven to allow external (IOAPIC and MSI) interrupts to reach up to 32768
> CPUs instead of just the 255 permitted on bare metal.
> 
> Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>

Corresponding kernel patch at 
https://patchwork.kernel.org/patch/11820535/

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