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[PULL 64/76] target/microblaze: Convert mbar to decodetree
From: |
Richard Henderson |
Subject: |
[PULL 64/76] target/microblaze: Convert mbar to decodetree |
Date: |
Mon, 31 Aug 2020 09:05:49 -0700 |
Split this out of the normal branch instructions,
as it requires special handling.
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/microblaze/insns.decode | 2 +
target/microblaze/translate.c | 85 +++++++++++++++++++---------------
2 files changed, 49 insertions(+), 38 deletions(-)
diff --git a/target/microblaze/insns.decode b/target/microblaze/insns.decode
index 9273a51d20..8eba47d90c 100644
--- a/target/microblaze/insns.decode
+++ b/target/microblaze/insns.decode
@@ -127,6 +127,8 @@ lwea 110010 ..... ..... ..... 0001 000 0000
@typea
lwx 110010 ..... ..... ..... 1000 000 0000 @typea
lwi 111010 ..... ..... ................ @typeb
+mbar 101110 imm:5 00010 0000 0000 0000 0100
+
mul 010000 ..... ..... ..... 000 0000 0000 @typea
mulh 010000 ..... ..... ..... 000 0000 0001 @typea
mulhu 010000 ..... ..... ..... 000 0000 0011 @typea
diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c
index 1c772b95d9..832cf85c64 100644
--- a/target/microblaze/translate.c
+++ b/target/microblaze/translate.c
@@ -1127,6 +1127,52 @@ static bool trans_brki(DisasContext *dc, arg_typeb_br
*arg)
return true;
}
+static bool trans_mbar(DisasContext *dc, arg_mbar *arg)
+{
+ int mbar_imm = arg->imm;
+
+ /* Data access memory barrier. */
+ if ((mbar_imm & 2) == 0) {
+ tcg_gen_mb(TCG_BAR_SC | TCG_MO_ALL);
+ }
+
+ /* Sleep. */
+ if (mbar_imm & 16) {
+ TCGv_i32 tmp_1;
+
+ if (trap_userspace(dc, true)) {
+ /* Sleep is a privileged instruction. */
+ return true;
+ }
+
+ t_sync_flags(dc);
+
+ tmp_1 = tcg_const_i32(1);
+ tcg_gen_st_i32(tmp_1, cpu_env,
+ -offsetof(MicroBlazeCPU, env)
+ +offsetof(CPUState, halted));
+ tcg_temp_free_i32(tmp_1);
+
+ tcg_gen_movi_i32(cpu_pc, dc->base.pc_next + 4);
+
+ gen_raise_exception(dc, EXCP_HLT);
+ }
+
+ /*
+ * If !(mbar_imm & 1), this is an instruction access memory barrier
+ * and we need to end the TB so that we recognize self-modified
+ * code immediately.
+ *
+ * However, there are some data mbars that need the TB break
+ * (and return to main loop) to recognize interrupts right away.
+ * E.g. recognizing a change to an interrupt controller register.
+ *
+ * Therefore, choose to end the TB always.
+ */
+ dc->cpustate_changed = 1;
+ return true;
+}
+
static bool trans_zero(DisasContext *dc, arg_zero *arg)
{
/* If opcode_0_illegal, trap. */
@@ -1417,50 +1463,13 @@ static void dec_bcc(DisasContext *dc)
static void dec_br(DisasContext *dc)
{
- unsigned int dslot, link, abs, mbar;
+ unsigned int dslot, link, abs;
uint32_t add_pc;
dslot = dc->ir & (1 << 20);
abs = dc->ir & (1 << 19);
link = dc->ir & (1 << 18);
- /* Memory barrier. */
- mbar = (dc->ir >> 16) & 31;
- if (mbar == 2 && dc->imm == 4) {
- uint16_t mbar_imm = dc->rd;
-
- /* Data access memory barrier. */
- if ((mbar_imm & 2) == 0) {
- tcg_gen_mb(TCG_BAR_SC | TCG_MO_ALL);
- }
-
- /* mbar IMM & 16 decodes to sleep. */
- if (mbar_imm & 16) {
- TCGv_i32 tmp_1;
-
- if (trap_userspace(dc, true)) {
- /* Sleep is a privileged instruction. */
- return;
- }
-
- t_sync_flags(dc);
-
- tmp_1 = tcg_const_i32(1);
- tcg_gen_st_i32(tmp_1, cpu_env,
- -offsetof(MicroBlazeCPU, env)
- +offsetof(CPUState, halted));
- tcg_temp_free_i32(tmp_1);
-
- tcg_gen_movi_i32(cpu_pc, dc->base.pc_next + 4);
-
- gen_raise_exception(dc, EXCP_HLT);
- return;
- }
- /* Break the TB. */
- dc->cpustate_changed = 1;
- return;
- }
-
if (dslot) {
dec_setup_dslot(dc);
}
--
2.25.1
- [PULL 53/76] target/microblaze: Convert dec_load and dec_store to decodetree, (continued)
- [PULL 53/76] target/microblaze: Convert dec_load and dec_store to decodetree, Richard Henderson, 2020/08/31
- [PULL 55/76] target/microblaze: Move bimm to BIMM_FLAG, Richard Henderson, 2020/08/31
- [PULL 56/76] target/microblaze: Fix no-op mb_cpu_transaction_failed, Richard Henderson, 2020/08/31
- [PULL 57/76] target/microblaze: Store "current" iflags in insn_start, Richard Henderson, 2020/08/31
- [PULL 58/76] tcg: Add tcg_get_insn_start_param, Richard Henderson, 2020/08/31
- [PULL 59/76] target/microblaze: Use cc->do_unaligned_access, Richard Henderson, 2020/08/31
- [PULL 60/76] target/microblaze: Replace clear_imm with tb_flags_to_set, Richard Henderson, 2020/08/31
- [PULL 62/76] target/microblaze: Tidy mb_cpu_dump_state, Richard Henderson, 2020/08/31
- [PULL 61/76] target/microblaze: Replace delayed_branch with tb_flags_to_set, Richard Henderson, 2020/08/31
- [PULL 63/76] target/microblaze: Convert brk and brki to decodetree, Richard Henderson, 2020/08/31
- [PULL 64/76] target/microblaze: Convert mbar to decodetree,
Richard Henderson <=
- [PULL 65/76] target/microblaze: Reorganize branching, Richard Henderson, 2020/08/31
- [PULL 66/76] target/microblaze: Convert dec_br to decodetree, Richard Henderson, 2020/08/31
- [PULL 67/76] target/microblaze: Convert dec_bcc to decodetree, Richard Henderson, 2020/08/31
- [PULL 68/76] target/microblaze: Convert dec_rts to decodetree, Richard Henderson, 2020/08/31
- [PULL 69/76] target/microblaze: Tidy do_rti, do_rtb, do_rte, Richard Henderson, 2020/08/31
- [PULL 70/76] target/microblaze: Convert msrclr, msrset to decodetree, Richard Henderson, 2020/08/31
- [PULL 71/76] target/microblaze: Convert dec_msr to decodetree, Richard Henderson, 2020/08/31
- [PULL 72/76] target/microblaze: Convert dec_stream to decodetree, Richard Henderson, 2020/08/31
- [PULL 74/76] target/microblaze: Remove cpu_R[0], Richard Henderson, 2020/08/31
- [PULL 73/76] target/microblaze: Remove last of old decoder, Richard Henderson, 2020/08/31