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[PULL 19/76] target/microblaze: Remove cpu_ear
From: |
Richard Henderson |
Subject: |
[PULL 19/76] target/microblaze: Remove cpu_ear |
Date: |
Mon, 31 Aug 2020 09:05:04 -0700 |
Since cpu_ear is only used during MSR and MTR instructions,
we can just as easily use an explicit load and store, so
eliminate the variable.
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/microblaze/translate.c | 23 +++++++++++++++--------
1 file changed, 15 insertions(+), 8 deletions(-)
diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c
index a862ac4055..f5ca25cead 100644
--- a/target/microblaze/translate.c
+++ b/target/microblaze/translate.c
@@ -57,7 +57,6 @@ static TCGv_i32 env_debug;
static TCGv_i32 cpu_R[32];
static TCGv_i32 cpu_pc;
static TCGv_i32 cpu_msr;
-static TCGv_i64 cpu_ear;
static TCGv_i32 cpu_esr;
static TCGv_i32 env_imm;
static TCGv_i32 env_btaken;
@@ -533,7 +532,12 @@ static void dec_msr(DisasContext *dc)
msr_write(dc, cpu_R[dc->ra]);
break;
case SR_EAR:
- tcg_gen_extu_i32_i64(cpu_ear, cpu_R[dc->ra]);
+ {
+ TCGv_i64 t64 = tcg_temp_new_i64();
+ tcg_gen_extu_i32_i64(t64, cpu_R[dc->ra]);
+ tcg_gen_st_i64(t64, cpu_env, offsetof(CPUMBState, ear));
+ tcg_temp_free_i64(t64);
+ }
break;
case SR_ESR:
tcg_gen_mov_i32(cpu_esr, cpu_R[dc->ra]);
@@ -573,10 +577,15 @@ static void dec_msr(DisasContext *dc)
msr_read(dc, cpu_R[dc->rd]);
break;
case SR_EAR:
- if (extended) {
- tcg_gen_extrh_i64_i32(cpu_R[dc->rd], cpu_ear);
- } else {
- tcg_gen_extrl_i64_i32(cpu_R[dc->rd], cpu_ear);
+ {
+ TCGv_i64 t64 = tcg_temp_new_i64();
+ tcg_gen_ld_i64(t64, cpu_env, offsetof(CPUMBState, ear));
+ if (extended) {
+ tcg_gen_extrh_i64_i32(cpu_R[dc->rd], t64);
+ } else {
+ tcg_gen_extrl_i64_i32(cpu_R[dc->rd], t64);
+ }
+ tcg_temp_free_i64(t64);
}
break;
case SR_ESR:
@@ -1865,8 +1874,6 @@ void mb_tcg_init(void)
tcg_global_mem_new_i32(cpu_env, offsetof(CPUMBState, pc), "rpc");
cpu_msr =
tcg_global_mem_new_i32(cpu_env, offsetof(CPUMBState, msr), "rmsr");
- cpu_ear =
- tcg_global_mem_new_i64(cpu_env, offsetof(CPUMBState, ear), "rear");
cpu_esr =
tcg_global_mem_new_i32(cpu_env, offsetof(CPUMBState, esr), "resr");
}
--
2.25.1
- [PULL 09/76] target/microblaze: Split out FSR from env->sregs, (continued)
- [PULL 09/76] target/microblaze: Split out FSR from env->sregs, Richard Henderson, 2020/08/31
- [PULL 10/76] target/microblaze: Split out BTR from env->sregs, Richard Henderson, 2020/08/31
- [PULL 11/76] target/microblaze: Split out EDR from env->sregs, Richard Henderson, 2020/08/31
- [PULL 12/76] target/microblaze: Split the cpu_SR array, Richard Henderson, 2020/08/31
- [PULL 13/76] target/microblaze: Fix width of PC and BTARGET, Richard Henderson, 2020/08/31
- [PULL 14/76] target/microblaze: Fix width of MSR, Richard Henderson, 2020/08/31
- [PULL 15/76] target/microblaze: Fix width of ESR, Richard Henderson, 2020/08/31
- [PULL 16/76] target/microblaze: Fix width of FSR, Richard Henderson, 2020/08/31
- [PULL 17/76] target/microblaze: Fix width of BTR, Richard Henderson, 2020/08/31
- [PULL 18/76] target/microblaze: Fix width of EDR, Richard Henderson, 2020/08/31
- [PULL 19/76] target/microblaze: Remove cpu_ear,
Richard Henderson <=
- [PULL 21/76] target/microblaze: Mark raise_exception as noreturn, Richard Henderson, 2020/08/31
- [PULL 20/76] target/microblaze: Tidy raising of exceptions, Richard Henderson, 2020/08/31
- [PULL 22/76] target/microblaze: Remove helper_debug and env->debug, Richard Henderson, 2020/08/31
- [PULL 23/76] target/microblaze: Rename env_* tcg variables to cpu_*, Richard Henderson, 2020/08/31
- [PULL 24/76] target/microblaze: Tidy mb_tcg_init, Richard Henderson, 2020/08/31
- [PULL 25/76] target/microblaze: Split out MSR[C] to its own variable, Richard Henderson, 2020/08/31
- [PULL 26/76] target/microblaze: Use DISAS_NORETURN, Richard Henderson, 2020/08/31
- [PULL 28/76] target/microblaze: Convert to DisasContextBase, Richard Henderson, 2020/08/31
- [PULL 27/76] target/microblaze: Check singlestep_enabled in gen_goto_tb, Richard Henderson, 2020/08/31
- [PULL 30/76] target/microblaze: Remove SIM_COMPAT, Richard Henderson, 2020/08/31