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[PULL 06/35] target/arm: Clarify HCR_EL2 ARMCPRegInfo type
From: |
Peter Maydell |
Subject: |
[PULL 06/35] target/arm: Clarify HCR_EL2 ARMCPRegInfo type |
Date: |
Fri, 28 Aug 2020 10:23:44 +0100 |
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
In commit ce4afed839 ("target/arm: Implement AArch32 HCR and HCR2")
the HCR_EL2 register has been changed from type NO_RAW (no underlying
state and does not support raw access for state saving/loading) to
type CONST (TCG can assume the value to be constant), removing the
read/write accessors.
We forgot to remove the previous type ARM_CP_NO_RAW. This is not
really a problem since the field is overwritten. However it makes
code review confuse, so remove it.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20200812111223.7787-1-f4bug@amsat.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/helper.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 6b4f0eb5334..44d666627a8 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -5105,7 +5105,6 @@ static const ARMCPRegInfo el3_no_el2_cp_reginfo[] = {
.access = PL2_RW,
.readfn = arm_cp_read_zero, .writefn = arm_cp_write_ignore },
{ .name = "HCR_EL2", .state = ARM_CP_STATE_BOTH,
- .type = ARM_CP_NO_RAW,
.opc0 = 3, .opc1 = 4, .crn = 1, .crm = 1, .opc2 = 0,
.access = PL2_RW,
.type = ARM_CP_CONST, .resetvalue = 0 },
--
2.20.1
- [PULL 00/35] target-arm queue, Peter Maydell, 2020/08/28
- [PULL 02/35] hw/clock: Remove unused clock_init*() functions, Peter Maydell, 2020/08/28
- [PULL 03/35] hw/clock: Let clock_set() return boolean value, Peter Maydell, 2020/08/28
- [PULL 01/35] hw/arm/sbsa-ref: fix typo breaking PCIe IRQs, Peter Maydell, 2020/08/28
- [PULL 04/35] hw/clock: Only propagate clock changes if the clock is changed, Peter Maydell, 2020/08/28
- [PULL 05/35] hw/arm/musicpal: Use AddressSpace for DMA transfers, Peter Maydell, 2020/08/28
- [PULL 06/35] target/arm: Clarify HCR_EL2 ARMCPRegInfo type,
Peter Maydell <=
- [PULL 07/35] target/arm: Pass the entire mte descriptor to mte_check_fail, Peter Maydell, 2020/08/28
- [PULL 08/35] target/arm: Fill in the WnR syndrome bit in mte_check_fail, Peter Maydell, 2020/08/28
- [PULL 09/35] hw/sd/allwinner-sdhost: Use AddressSpace for DMA transfers, Peter Maydell, 2020/08/28
- [PULL 10/35] hw/net/allwinner-sun8i-emac: Use AddressSpace for DMA transfers, Peter Maydell, 2020/08/28
- [PULL 11/35] hw/arm/xilinx_zynq: Uninline cadence_uart_create(), Peter Maydell, 2020/08/28
- [PULL 13/35] hw/qdev-clock: Uninline qdev_connect_clock_in(), Peter Maydell, 2020/08/28
- [PULL 12/35] hw/arm/xilinx_zynq: Call qdev_connect_clock_in() before DeviceRealize, Peter Maydell, 2020/08/28
- [PULL 14/35] hw/qdev-clock: Avoid calling qdev_connect_clock_in after DeviceRealize, Peter Maydell, 2020/08/28
- [PULL 16/35] hw/misc/unimp: Display the value with width of the access size, Peter Maydell, 2020/08/28
- [PULL 15/35] hw/misc/unimp: Display value after offset, Peter Maydell, 2020/08/28