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Re: [PATCH] acpi: Fix access to PM1 control and status registers
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From: |
Anthony PERARD |
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Subject: |
Re: [PATCH] acpi: Fix access to PM1 control and status registers |
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Date: |
Thu, 23 Jul 2020 14:14:50 +0100 |
On Thu, Jul 23, 2020 at 03:54:18PM +0300, Michael Tokarev wrote:
> 01.07.2020 15:48, Anthony PERARD wrote:
>
> > I actually tried, but when reading `addr` or `addr+1` I had the same
> > value. So I guess `addr` wasn't taken into account.
>
> AFAICS, these registers aren't actually supposed to be accessed like this
> as addr+1. ACPI and ISA spec states multiple times that `addr' should be
> accessible as 8/16/32 bits, but it does not mention `addr+1' or `addr+2'.
I guess that's why there's never been a "fix" for this before. Thanks
for the explanation.
> So far all now-rejected accesses we've seen (not that many but still) goes
> to `addr', not to any other variation of it.
>
> /mjt
--
Anthony PERARD