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[PULL 20/32] tests/machine-none: Add AVR support
From: |
Philippe Mathieu-Daudé |
Subject: |
[PULL 20/32] tests/machine-none: Add AVR support |
Date: |
Tue, 7 Jul 2020 20:16:58 +0200 |
From: Michael Rolnik <mrolnik@gmail.com>
Add a single code line that will automatically provide
'machine none' test.
Signed-off-by: Michael Rolnik <mrolnik@gmail.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Thomas Huth <huth@tuxfamily.org>
Message-Id: <20200705140315.260514-28-huth@tuxfamily.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
tests/qtest/machine-none-test.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/tests/qtest/machine-none-test.c b/tests/qtest/machine-none-test.c
index 8b7abea8af..57107f1aec 100644
--- a/tests/qtest/machine-none-test.c
+++ b/tests/qtest/machine-none-test.c
@@ -27,6 +27,7 @@ static struct arch2cpu cpus_map[] = {
/* tested targets list */
{ "arm", "cortex-a15" },
{ "aarch64", "cortex-a57" },
+ { "avr", "avr6-avr-cpu" },
{ "x86_64", "qemu64,apic-id=0" },
{ "i386", "qemu32,apic-id=0" },
{ "alpha", "ev67" },
--
2.21.3
- [PULL 10/32] target/avr: Add instruction translation - Register definitions, (continued)
- [PULL 10/32] target/avr: Add instruction translation - Register definitions, Philippe Mathieu-Daudé, 2020/07/07
- [PULL 11/32] target/avr: Add instruction translation - Arithmetic and Logic Instructions, Philippe Mathieu-Daudé, 2020/07/07
- [PULL 12/32] target/avr: Add instruction translation - Branch Instructions, Philippe Mathieu-Daudé, 2020/07/07
- [PULL 13/32] target/avr: Add instruction translation - Data Transfer Instructions, Philippe Mathieu-Daudé, 2020/07/07
- [PULL 15/32] target/avr: Add instruction translation - MCU Control Instructions, Philippe Mathieu-Daudé, 2020/07/07
- [PULL 14/32] target/avr: Add instruction translation - Bit and Bit-test Instructions, Philippe Mathieu-Daudé, 2020/07/07
- [PULL 17/32] target/avr: Initialize TCG register variables, Philippe Mathieu-Daudé, 2020/07/07
- [PULL 16/32] target/avr: Add instruction translation - CPU main translation function, Philippe Mathieu-Daudé, 2020/07/07
- [PULL 18/32] target/avr: Add support for disassembling via option '-d in_asm', Philippe Mathieu-Daudé, 2020/07/07
- [PULL 19/32] target/avr: Register AVR support with the rest of QEMU, Philippe Mathieu-Daudé, 2020/07/07
- [PULL 20/32] tests/machine-none: Add AVR support,
Philippe Mathieu-Daudé <=
- [PULL 21/32] hw/char: avr: Add limited support for USART peripheral, Philippe Mathieu-Daudé, 2020/07/07
- [PULL 22/32] hw/timer: avr: Add limited support for 16-bit timer peripheral, Philippe Mathieu-Daudé, 2020/07/07
- [PULL 26/32] hw/avr: Add limited support for some Arduino boards, Philippe Mathieu-Daudé, 2020/07/07
- [PULL 24/32] hw/avr: Add support for loading ELF/raw binaries, Philippe Mathieu-Daudé, 2020/07/07
- [PULL 27/32] tests/boot-serial: Test some Arduino boards (AVR based), Philippe Mathieu-Daudé, 2020/07/07
- [PULL 23/32] hw/misc: avr: Add limited support for power reduction device, Philippe Mathieu-Daudé, 2020/07/07
- [PULL 31/32] target/avr/cpu: Fix $PC displayed address, Philippe Mathieu-Daudé, 2020/07/07
- [PULL 32/32] target/avr/disas: Fix store instructions display order, Philippe Mathieu-Daudé, 2020/07/07