[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PULL 05/32] target/avr: CPU class: Add migration support
From: |
Philippe Mathieu-Daudé |
Subject: |
[PULL 05/32] target/avr: CPU class: Add migration support |
Date: |
Tue, 7 Jul 2020 20:16:43 +0200 |
From: Michael Rolnik <mrolnik@gmail.com>
Add migration-related functions of AVR CPU class object.
[AM: Split a larger AVR introduction patch into logical units]
Suggested-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com>
Co-developed-by: Michael Rolnik <mrolnik@gmail.com>
Co-developed-by: Sarah Harris <S.E.Harris@kent.ac.uk>
Signed-off-by: Michael Rolnik <mrolnik@gmail.com>
Signed-off-by: Sarah Harris <S.E.Harris@kent.ac.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com>
Acked-by: Igor Mammedov <imammedo@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Thomas Huth <huth@tuxfamily.org>
Message-Id: <20200705140315.260514-6-huth@tuxfamily.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
target/avr/cpu.h | 2 +
target/avr/cpu.c | 1 +
target/avr/machine.c | 121 +++++++++++++++++++++++++++++++++++++++++++
3 files changed, 124 insertions(+)
create mode 100644 target/avr/machine.c
diff --git a/target/avr/cpu.h b/target/avr/cpu.h
index bac12dc684..59b89a3a71 100644
--- a/target/avr/cpu.h
+++ b/target/avr/cpu.h
@@ -118,6 +118,8 @@ typedef struct AVRCPU {
CPUAVRState env;
} AVRCPU;
+extern const struct VMStateDescription vms_avr_cpu;
+
void avr_cpu_do_interrupt(CPUState *cpu);
bool avr_cpu_exec_interrupt(CPUState *cpu, int int_req);
hwaddr avr_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
diff --git a/target/avr/cpu.c b/target/avr/cpu.c
index a8636015a3..f4b2d6f55c 100644
--- a/target/avr/cpu.c
+++ b/target/avr/cpu.c
@@ -206,6 +206,7 @@ static void avr_cpu_class_init(ObjectClass *oc, void *data)
cc->memory_rw_debug = avr_cpu_memory_rw_debug;
cc->get_phys_page_debug = avr_cpu_get_phys_page_debug;
cc->tlb_fill = avr_cpu_tlb_fill;
+ cc->vmsd = &vms_avr_cpu;
cc->disas_set_info = avr_cpu_disas_set_info;
cc->tcg_initialize = avr_cpu_tcg_init;
cc->synchronize_from_tb = avr_cpu_synchronize_from_tb;
diff --git a/target/avr/machine.c b/target/avr/machine.c
new file mode 100644
index 0000000000..e61ea0519a
--- /dev/null
+++ b/target/avr/machine.c
@@ -0,0 +1,121 @@
+/*
+ * QEMU AVR CPU
+ *
+ * Copyright (c) 2016-2020 Michael Rolnik
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2.1 of the License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with this library; if not, see
+ * <http://www.gnu.org/licenses/lgpl-2.1.html>
+ */
+
+#include "qemu/osdep.h"
+#include "cpu.h"
+#include "migration/cpu.h"
+
+static int get_sreg(QEMUFile *f, void *opaque, size_t size,
+ const VMStateField *field)
+{
+ CPUAVRState *env = opaque;
+ uint8_t sreg;
+
+ sreg = qemu_get_byte(f);
+ cpu_set_sreg(env, sreg);
+ return 0;
+}
+
+static int put_sreg(
+ QEMUFile *f, void *opaque, size_t size,
+ const VMStateField *field, QJSON *vmdesc)
+{
+ CPUAVRState *env = opaque;
+ uint8_t sreg = cpu_get_sreg(env);
+
+ qemu_put_byte(f, sreg);
+ return 0;
+}
+
+static const VMStateInfo vms_sreg = {
+ .name = "sreg",
+ .get = get_sreg,
+ .put = put_sreg,
+};
+
+static int get_segment(
+ QEMUFile *f, void *opaque, size_t size, const VMStateField *field)
+{
+ uint32_t *ramp = opaque;
+ uint8_t temp;
+
+ temp = qemu_get_byte(f);
+ *ramp = ((uint32_t)temp) << 16;
+ return 0;
+}
+
+static int put_segment(
+ QEMUFile *f, void *opaque, size_t size,
+ const VMStateField *field, QJSON *vmdesc)
+{
+ uint32_t *ramp = opaque;
+ uint8_t temp = *ramp >> 16;
+
+ qemu_put_byte(f, temp);
+ return 0;
+}
+
+static const VMStateInfo vms_rampD = {
+ .name = "rampD",
+ .get = get_segment,
+ .put = put_segment,
+};
+static const VMStateInfo vms_rampX = {
+ .name = "rampX",
+ .get = get_segment,
+ .put = put_segment,
+};
+static const VMStateInfo vms_rampY = {
+ .name = "rampY",
+ .get = get_segment,
+ .put = put_segment,
+};
+static const VMStateInfo vms_rampZ = {
+ .name = "rampZ",
+ .get = get_segment,
+ .put = put_segment,
+};
+static const VMStateInfo vms_eind = {
+ .name = "eind",
+ .get = get_segment,
+ .put = put_segment,
+};
+
+const VMStateDescription vms_avr_cpu = {
+ .name = "cpu",
+ .version_id = 0,
+ .minimum_version_id = 0,
+ .fields = (VMStateField[]) {
+ VMSTATE_UINT32(env.pc_w, AVRCPU),
+ VMSTATE_UINT32(env.sp, AVRCPU),
+ VMSTATE_UINT32(env.skip, AVRCPU),
+
+ VMSTATE_UINT32_ARRAY(env.r, AVRCPU, NUMBER_OF_CPU_REGISTERS),
+
+ VMSTATE_SINGLE(env, AVRCPU, 0, vms_sreg, CPUAVRState),
+ VMSTATE_SINGLE(env.rampD, AVRCPU, 0, vms_rampD, uint32_t),
+ VMSTATE_SINGLE(env.rampX, AVRCPU, 0, vms_rampX, uint32_t),
+ VMSTATE_SINGLE(env.rampY, AVRCPU, 0, vms_rampY, uint32_t),
+ VMSTATE_SINGLE(env.rampZ, AVRCPU, 0, vms_rampZ, uint32_t),
+ VMSTATE_SINGLE(env.eind, AVRCPU, 0, vms_eind, uint32_t),
+
+ VMSTATE_END_OF_LIST()
+ }
+};
--
2.21.3
- [PULL 00/32] AVR port, Philippe Mathieu-Daudé, 2020/07/07
- [PULL 01/32] target/avr: Add basic parameters of the new platform, Philippe Mathieu-Daudé, 2020/07/07
- [PULL 02/32] target/avr: Introduce basic CPU class object, Philippe Mathieu-Daudé, 2020/07/07
- [PULL 03/32] target/avr: CPU class: Add interrupt handling support, Philippe Mathieu-Daudé, 2020/07/07
- [PULL 04/32] target/avr: CPU class: Add memory menagement support, Philippe Mathieu-Daudé, 2020/07/07
- [PULL 05/32] target/avr: CPU class: Add migration support,
Philippe Mathieu-Daudé <=
- [PULL 06/32] target/avr: CPU class: Add GDB support, Philippe Mathieu-Daudé, 2020/07/07
- [PULL 07/32] target/avr: Introduce enumeration AVRFeature, Philippe Mathieu-Daudé, 2020/07/07
- [PULL 08/32] target/avr: Add definitions of AVR core types, Philippe Mathieu-Daudé, 2020/07/07
- [PULL 09/32] target/avr: Add instruction helpers, Philippe Mathieu-Daudé, 2020/07/07
- [PULL 10/32] target/avr: Add instruction translation - Register definitions, Philippe Mathieu-Daudé, 2020/07/07
- [PULL 11/32] target/avr: Add instruction translation - Arithmetic and Logic Instructions, Philippe Mathieu-Daudé, 2020/07/07
- [PULL 12/32] target/avr: Add instruction translation - Branch Instructions, Philippe Mathieu-Daudé, 2020/07/07
- [PULL 13/32] target/avr: Add instruction translation - Data Transfer Instructions, Philippe Mathieu-Daudé, 2020/07/07
- [PULL 15/32] target/avr: Add instruction translation - MCU Control Instructions, Philippe Mathieu-Daudé, 2020/07/07
- [PULL 14/32] target/avr: Add instruction translation - Bit and Bit-test Instructions, Philippe Mathieu-Daudé, 2020/07/07