[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PULL 1/3] target/mips: fpu: Fix recent regression in add.s after 1ace09
From: |
Aleksandar Markovic |
Subject: |
[PULL 1/3] target/mips: fpu: Fix recent regression in add.s after 1ace099f2a |
Date: |
Tue, 7 Jul 2020 18:41:00 +0200 |
From: Alex Richardson <Alexander.Richardson@cl.cam.ac.uk>
After merging latest QEMU upstream into our CHERI fork, I noticed
that some of the FPU tests in our MIPS baremetal testsuite
(https://github.com/CTSRD-CHERI/cheritest) started failing
It turns out that commit 1ace099f2a accidentally changed add.s
into a subtract.
Fixes: 1ace099f2a ("target/mips: fpu: Demacro ADD.<D|S|PS>")
Signed-off-by: Alex Richardson <Alexander.Richardson@cl.cam.ac.uk>
Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20200703161515.25966-1-Alexander.Richardson@cl.cam.ac.uk>
---
target/mips/fpu_helper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/mips/fpu_helper.c b/target/mips/fpu_helper.c
index 7a3a61c..56beda4 100644
--- a/target/mips/fpu_helper.c
+++ b/target/mips/fpu_helper.c
@@ -1221,7 +1221,7 @@ uint32_t helper_float_add_s(CPUMIPSState *env,
{
uint32_t wt2;
- wt2 = float32_sub(fst0, fst1, &env->active_fpu.fp_status);
+ wt2 = float32_add(fst0, fst1, &env->active_fpu.fp_status);
update_fcr31(env, GETPC());
return wt2;
}
--
2.7.4
- [PULL 0/3] MIPS + TCG Continuous Benchmarking queue for July 7th, 2020, Aleksandar Markovic, 2020/07/07
- [PULL 1/3] target/mips: fpu: Fix recent regression in add.s after 1ace099f2a,
Aleksandar Markovic <=
- [PULL 3/3] scripts/performance: Add dissect.py script, Aleksandar Markovic, 2020/07/07
- [PULL 2/3] disas: mips: Add Loongson 2F disassembler, Aleksandar Markovic, 2020/07/07
- Re: [PULL 0/3] MIPS + TCG Continuous Benchmarking queue for July 7th, 2020, no-reply, 2020/07/07
- Re: [PULL 0/3] MIPS + TCG Continuous Benchmarking queue for July 7th, 2020, Thomas Huth, 2020/07/07