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RE: [PATCH] intel_iommu: Use correct shift for 256 bits qi descriptor
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From: |
Liu, Yi L |
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Subject: |
RE: [PATCH] intel_iommu: Use correct shift for 256 bits qi descriptor |
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Date: |
Tue, 7 Jul 2020 02:24:53 +0000 |
> From: Peter Xu <peterx@redhat.com>
> Sent: Tuesday, July 7, 2020 4:58 AM
>
> On Sat, Jul 04, 2020 at 01:07:15AM -0700, Liu Yi L wrote:
> > In chapter 10.4.23 of VT-d spec 3.0, Descriptor Width bit was
> > introduced in VTD_IQA_REG. Sfotware could set this bit to tell VT-d
> > the QI descriptor from software would be 256 bits. Accordingly, the
> > VTD_IQH_QH_SHIFT should be 5 when descriptor size is 256 bits.
> >
> > This patch adds the DW bit check when deciding the shift used to
> > update VTD_IQH_REG.
> >
> > Signed-off-by: Liu Yi L <yi.l.liu@intel.com>
>
> Reviewed-by: Peter Xu <peterx@redhat.com>
thanks.
Regards,
Yi Liu