Re: How the cpu_R in DisasContext is associated with register of CPUArchState

[沈梦姣]

Thanks for the detail! And I’m exactly looking at arm, thanks!

Another question, how does gen_helper_* generate code? And how it make sure the 
sequence, for example tcg_gen_mov_* generate some code, and then need 
gen_helper_* to do some extra work? Thanks in advance!

> 在 2020年7月3日，下午10:40，Peter Maydell <peter.maydell@linaro.org> 写道：
> 
> On Fri, 3 Jul 2020 at 15:15, 沈梦姣 <shen.mengjiao3@icloud.com> wrote:
>> 
>> Because in translate stage when write cpu register by guest code, it 
>> operates totally on cpu_R of DisasContext, how to reflect it to register of 
>> CPUArchState?
> 
> You don't say which target you're looking at, but in general
> these mappings are set up when the translator is initialized.
> For instance for Arm, arm_translate_init() does this:
>    for (i = 0; i < 16; i++) {
>        cpu_R[i] = tcg_global_mem_new_i32(cpu_env,
>                                          offsetof(CPUARMState, regs[i]),
>                                          regnames[i]);
>    }
> 
> which creates the cpu_R[] TCGvs as TCG global variables which
> live in the regs[] field of the CPUARMState structure. Whenever
> TCG code is generated that accesses that global it will read
> and write from the memory location corresponding to the
> regs[] array entry in the CPU struct.
> 
> thanks
> -- PMM
>